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1. Commits on Feb 23, 2017

   • S/390: Add support for new cpu architecture - arch12.

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     Andreas Krebbel

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   • opcodes,gas: associate SPARC ASIs with an architecture level.

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     Sheldon Lobo

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     jemarch

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2. Commits on Feb 15, 2017

   • Add SFENCE.VMA instruction

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     aswaterman

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     palmer-dabbelt

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3. Commits on Feb 14, 2017

   • PowerPC register expression checks

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     amodra

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4. Commits on Feb 6, 2017

   • [ARC] Provide an interface to decode ARC instructions.

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     Claudiu Zissulescu

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5. Commits on Jan 25, 2017

   • Clarify that include/opcode/ files are part of GNU opcodes

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     Dimitar Dimitrov

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     palves

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6. Commits on Jan 4, 2017

   • [AArch64] Add separate feature flag for weaker release consistent load insns

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     nsz-arm

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7. Commits on Jan 3, 2017

   • Add support for the Q extension to the RISCV ISA.

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     kito-cheng

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     nickclifton

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8. Commits on Jan 2, 2017

   • Update year range in copyright notice of all files.

     amodra

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9. Commits on Dec 31, 2016

   • PRU BFD support

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     Dimitar Dimitrov

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     amodra

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10. Commits on Dec 23, 2016

    • MIPS16: Add ASMACRO instruction support

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      Maciej W. Rozycki

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    • MIPS16: Reassign `0' and `4' operand codes

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      Maciej W. Rozycki

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    • MIPS16: Handle non-extensible instructions correctly

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      Maciej W. Rozycki

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11. Commits on Dec 21, 2016

    • Remove high bit set characters

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      amodra

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12. Commits on Dec 20, 2016

    • MIPS16: Switch to 32-bit opcode table interpretation

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      Maciej W. Rozycki

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13. Commits on Dec 13, 2016

    • [Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field

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      Renlin Li

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14. Commits on Dec 9, 2016

    • MIPS16: Remove unused `>' operand code

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      Maciej W. Rozycki

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15. Commits on Dec 7, 2016

    • MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASK

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      Maciej W. Rozycki

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    • MIPS/include: opcode/mips.h: Add a comment for ASE_DSPR3

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      Maciej W. Rozycki

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16. Commits on Dec 5, 2016

    • [ARM] Add ARMv8.3 command line option and feature flag

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      nsz-arm

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17. Commits on Nov 29, 2016

    • [ARC] Add checking for LP_COUNT reg usage, improve error reporting.

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      Claudiu Zissulescu

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18. Commits on Nov 22, 2016

    • gas,opcodes: fix hardware capabilities bumping in the sparc assembler.

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      jemarch

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    • PR20744, Incorrect PowerPC VLE relocs

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      amodra

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19. Commits on Nov 18, 2016

    • [AArch64] Add ARMv8.3 FCMLA and FCADD instructions

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      nsz-arm

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    • [AArch64] Add ARMv8.3 combined pointer authentication load instructions

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      nsz-arm

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20. Commits on Nov 11, 2016

    • [AArch64] Add ARMv8.3 PACGA instruction

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      nsz-arm

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    • [AArch64] Add ARMv8.3 command line option and feature flag

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      nsz-arm

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21. Commits on Nov 4, 2016

    • Add support for ARM Cortex-M33 processor

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      RoboTux

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22. Commits on Nov 3, 2016

    • arc: Implement NPS-400 dcmac instruction

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      gmarkall

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    • arc: Change max instruction length to 64-bits

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      T-J-Teru

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      gmarkall

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    • opcodes/arc: Make some macros 64-bit safe

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      gmarkall

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    • arc: Replace ARC_SHORT macro with arc_opcode_len function

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      gmarkall

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23. Commits on Nov 1, 2016

    • Add support for RISC-V architecture.

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      nickclifton

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24. Commits on Oct 14, 2016

    • [ARC] Disassembler: fix LIMM detection for short instructions.

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      Claudiu Zissulescu

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25. Commits on Sep 29, 2016

    • Disallow 3-operand cmp[l][i] for ppc64

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      amodra

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