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1. Commits on Oct 24, 2017

   • RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0

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     aswaterman

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     palmer-dabbelt

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   • RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2

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     aswaterman

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     palmer-dabbelt

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2. Commits on Jul 28, 2017

   • Fix problems parsing RISCV architecture extenstions in the assembler.

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     aswaterman

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     nickclifton

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3. Commits on Jun 29, 2017

   • RISC-V: Fix TLS copy relocs

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     aswaterman

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     palmer-dabbelt

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4. Commits on Jun 23, 2017

   • RISC-V: Fix SLTI disassembly

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     aswaterman

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     palmer-dabbelt

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   • RISC-V: Error, don't warn, for shfit amounts/CSRs

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     aswaterman

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     palmer-dabbelt

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5. Commits on Mar 31, 2017

   • RISC-V: Add physical memory protection CSRs

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     aswaterman

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     palmer-dabbelt

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6. Commits on Mar 14, 2017

   • RISC-V: Fix [dis]assembly of srai/srli

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     aswaterman

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     palmer-dabbelt

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7. Commits on Feb 24, 2017

   • bfd: RISC-V: relax to gp in more cases.

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     aswaterman

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     palmer-dabbelt

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   • Add new counter-enable CSRs

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     aswaterman

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     palmer-dabbelt

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8. Commits on Feb 15, 2017

   • Add SFENCE.VMA instruction

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     aswaterman

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     palmer-dabbelt

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9. Commits on Feb 8, 2017

   • Fix segfault when .plt section does not exist

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     aswaterman

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     palmer-dabbelt

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10. Commits on Jan 9, 2017

    • RISC-V/GAS: Support more relocs against constant addresses

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      aswaterman

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      palmer-dabbelt

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    • RISC-V/GAS: Improve handling of invalid relocs

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      aswaterman

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      palmer-dabbelt

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    • RISC-V/GAS: Correct branch relaxation for weak symbols.

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      aswaterman

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      nickclifton

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11. Commits on Dec 21, 2016

    • Support aligning text section from odd addresses

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      aswaterman

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      amodra

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    • Avoid creating symbol table entries for registers

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      aswaterman

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      amodra

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12. Commits on Dec 20, 2016

    • Correct assembler mnemonic for RISC-V aqrl AMOs

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      aswaterman

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      amodra

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    • Fix disassembly of RISC-V CSR instructions under -Mno-aliases

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      aswaterman

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      amodra

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    • Add canonical JALR for RISC-V

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      aswaterman

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      amodra

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    • Don't define RISC-V .p2align

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      aswaterman

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      amodra

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    • Re-work RISC-V gas flags: now we just support -mabi and -march

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      aswaterman

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      amodra

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    • Fix an integer overflow in RISC-V relocation handling

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      aswaterman

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      amodra

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    • Rework RISC-V relocations

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      aswaterman

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      amodra

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    • Formatting changes for RISC-V

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      aswaterman

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      amodra

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