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Achievement: Starstruckx2Achievement: Arctic Code Vault ContributorAchievement: Pull Sharkx2

Achievements

Achievement: Starstruckx2Achievement: Arctic Code Vault ContributorAchievement: Pull Sharkx2

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@NVIDIA
NVIDIA Corporation NVIDIA

2788 San Tomas Expressway, Santa Clara, CA, 95051

@johonkanen
Jari Honkanen johonkanen
Maintainer of high level synthesizable VHDL (hVHDL) project on github
@SayranFelix
Sayran Felix SayranFelix
- Hello, my name's is Sayran, I'm 14 years old and my dream is to be a great programmer! 😄
@KatCe
Katharina Ceesay-Seitz KatCe
Hardware Security Researcher @comsec-group ETH Zurich, Ex-CERN Embedded Software Developer / Digital Electronics Verification Engineer

ETH Zurich Zurich

@aolofsson
Andreas Olofsson aolofsson
Democratizing silicon

Zero ASIC Corporation Cambridge, MA, USA

@BrunoLevy
Bruno Levy BrunoLevy
Researcher in computational physics, Scientific director of Inria Quadrant Program, 2018-2022 director of centre Inria Nancy Grand-Est, ERC GOODSHAPE

@inria Saclay, France

@ultraembedded
ultraembedded
CPU designs, digital HW IP, emulation and embedded system projects

UK

@mattvenn
Matt Venn mattvenn
Engineer and Science Communication. On a mission to make ASICs more accessible. YosysHQ & Tiny Tapeout founder member.

@YosysHQ-GmbH @TinyTapeout Valencia, Spain

@tiagoryandev
Tiago Ryan tiagoryandev
FullStack Developer JavaScript

MOV Fibra Santarém/PA - Brasil

@alexforencich
Alex Forencich alexforencich

UC San Diego La Jolla, CA

@JimLewis
Jim Lewis JimLewis
VHDL Verification Specialist, OSVVM author, VHDL Trainer (including on OSVVM), IEEE VHDL WG Chair, Yoga Teacher

SynthWorks / OSVVM Tigard, OR

@qarlosalberto
Carlos Alberto Ruiz Naranjo qarlosalberto

@AMD Zaragoza, Spain

@dkozel
Derek Kozel dkozel
Member of GNU Radio leadership, RF design, Electronics, Open Source, MW0LNA

Cardiff, Wales

@rftafas
Ricardo F Tafas Jr rftafas
Eletrical Engineer, MSC on Telecomunication, several times manager and Developer. Specialty on Hardware, HDLs (mostly VHDL and SysVerilog). Sometimes writer.

@espressif Campinas - SP

@clairexen
Claire Xen clairexen
Claire Xenia Wolf

@YosysHQ Vienna

@r4d10n
Rakesh Peter r4d10n

India

@tmeissner
T. Meissner tmeissner
FPGA-Engineer doing design and verification using VHDL, SystemVerilog, SVA and PSL.

Dresden, Germany

@FelipeDocil
FelipeDocil
@yrrapt
Thomas Parry yrrapt
Analogue/Digital ASIC design, RF/SDR, High Reliability and Space

The Netherlands

@svancau
Sebastien Van Cauwenberghe svancau
FPGA/ASIC designer, Embedded system engineer

Sebsky Development Brussels, Belgium

@rrika
Erika rrika
GPU compiler dev
@ZipCPU
Dan Gisselquist ZipCPU

Gisselquist Technology, LLC

@robtaylor
Rob Taylor robtaylor

Manchester

@umarcor
Unai Martinez-Corral umarcor

UPV/EHU Bilbo, Bizkaia, Euskadi, Spain, Europe

@ktemkin
Kate Temkin ktemkin
Hardware hacker(s) & low-level engineer(s). Focus: tools to help you do cool things. Archived repos @ktemkin-archive. Avatar by https://twitter.com/feyrah

Denver, CO

@steamka90
Samuel Lee steamka90

Belfast, United Kingdom

@whitequark
Catherine whitequark
the catgirl knows where it is at all times

@SCISemi UK

@mohamed
Mohamed A. Bamakhrama mohamed

imec Third rock from the Sun

@ahmedshahein
Ahmed Shahein ahmedshahein
I am a passionate HW engineer. DSP is my beloved passion. You can ask me in VHDL, Verilog, Matlab, and Bash.

Netherlands

@eine
eine
@cliffordwolf
Claire Wolf cliffordwolf

Vienna

@LarsAsplund
Lars Asplund LarsAsplund
@pepijndevos
Pepijn de Vos pepijndevos

Loenen, Gelderland, Netherlands

@rosskata
rosskata
@olofk
Olof Kindgren olofk
@heeckhau
Hendrik Eeckhaut heeckhau

@privacy-scaling-explorations Gent, Belgium

@yminsky
Yaron Minsky yminsky

Jane Street New York, USA

@HFTrader
Henrique Bucher HFTrader
Consulting and development C++/FPGA/GPU. Focus on Ultra Low Latency Trading. Crypto. Ex-Citadel, ex-JP Morgan. Brazilian, BSc/MSc/PhD in Engineering.

Vitorian LLC Chicago, IL

@tgingold
tgingold
@Paebbels
Patrick Lehmann Paebbels
Vice-Chair of the IEEE P1076 Working Group (VHDL Analysis and Standardization Group- VASG). I'm a VHDL expert and FPGA-technology trainer at @PLC2.

@PLC2 Bötzingen, Germany

@albertschulz
Albert Schulz albertschulz

developer Dresden

@benreynwar
Ben Reynwar benreynwar

Independent Tucson, Arizona, USA

@lfaguedes
lfaguedes
@tassianors
Tassiano Neuhaus tassianors

Ottawa, Canada

@rbprado
Rafael Benhur do Prado rbprado

Porto Alegre - RS

@scrooloose
Martin Grenfell scrooloose

UK