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SHRADDHA SRIDHAR
shsridhar-beep
Leading Agentic AI in Chip Design at NVIDIA.
Sharing lessons learned as an industry practitioner at https://shraddhasridhar.substack.com/
NVIDIA Redwood City
Cesar Fuguet
cfuguet
Researcher on computer architecture, digital hardware designer and processor architect.
Inria, TIMA Laboratory, University Grenoble Alpes Grenoble, France
Philippe Sauter
phsauter
EE PhD with a focus towards open-source EDA tools
ETH Zürich Zürich, Switzerland
Ilia
greenblat
Designing chips (VLSI, ASIC, not french fries) for many years and companies. Always looking for ways to do it effectively, so i can get home before darkness.
myself. Israel
François Galea
zerkman
Software and hardware developer.
C, Lua, VHDL, 68000 assembly.
Currently developing zeST, a reimplementation of an Atari ST on cheap FPGA prototyping boards.
France
FPGA Research @ The University of Manchester
FPGA-Research-Manchester
Group of Dirk Koch and his great students and postdocs. Content has been moved to https://github.com/FPGA-Research.
Matt Venn
mattvenn
Engineer and Science Communication. On a mission to make ASICs more accessible. YosysHQ & Tiny Tapeout founder member.
@YosysHQ-GmbH @TinyTapeout Valencia, Spain
Symbiotic EDA
SymbioticEDA
Symbiotic EDA writes open source tools for digital circuit designers to make them more productive.
Vienna
