Issues

• verilator fails to compile small Example

  ucb-bar/chisel2-deprecated#742 · Filter by author oharboe opened on Feb 24, 2017

• Queue is not getting synthesized

  ucb-bar/chisel2-deprecated#737 · Filter by author preyas3359 opened on Oct 19, 2016

• abstract type T in type pattern Chisel.Ex[T] is unchecked since it is eliminated by erasure

  ucb-bar/chisel2-deprecated#730 · Filter by author drom opened on Sep 12, 2016

• Exception: sbt.TrapExitSecurityException

  ucb-bar/chisel2-deprecated#729 · Filter by author drom opened on Sep 12, 2016
  2

• Support bulk connects in when?

  ucb-bar/chisel2-deprecated#727 · Filter by author jkorinth opened on Sep 3, 2016

• Uninferrable width on reg after using fromBits

  ucb-bar/chisel2-deprecated#726 · Filter by author da-steve101 opened on Aug 31, 2016

• RegUpdate and RegReset?

  ucb-bar/chisel2-deprecated#724 · Filter by author cornytrace opened on Aug 15, 2016
  3

• firrtl_interpreter/Concrete.scala: randomSInt produces out of bounds value.

  ucb-bar/chisel2-deprecated#723 · Filter by author stevenmburns opened on Aug 4, 2016
  2

• OrderedDecoupledHWIOTester doesn't report error when compare failed

  ucb-bar/chisel2-deprecated#716 · Filter by author songmaotian opened on Jul 4, 2016

• Will OrderedDecoupledHWIOTester insert bubble for the output.ready signal?

  ucb-bar/chisel2-deprecated#715 · Filter by author songmaotian opened on Jul 2, 2016
  2

• val differs from expression after assignment

  ucb-bar/chisel2-deprecated#713 · Filter by author pw-gecos opened on Jun 1, 2016

• Verilog doesn't useelse so memory not inferred as RAM

  ucb-bar/chisel2-deprecated#709 · Filter by author sclukey opened on May 23, 2016
  2

• Cautionary Tale -- Chisel/ISE issue

  ucb-bar/chisel2-deprecated#707 · Filter by author shunshou opened on May 18, 2016
  3

• Inconsistent member names in C++ emulator

  ucb-bar/chisel2-deprecated#706 · Filter by author kenmcmil opened on May 17, 2016

• Java Exception (and useless error message) on a Reg of Vec of size 0

  ucb-bar/chisel2-deprecated#703 · Filter by author ccelio opened on May 12, 2016

• Flag to enable warnings for any modules with any unconnected ports

  ucb-bar/chisel2-deprecated#702 · Filter by author ascenium opened on May 11, 2016
  1

• Use of "config" as a Chisel value name results in syntax error in Verilog output

  ucb-bar/chisel2-deprecated#701 · Filter by author ascenium opened on May 4, 2016

• Bulk connects do not override bundle components

  ucb-bar/chisel2-deprecated#699 · Filter by author colinschmidt opened on Apr 28, 2016
  4

• Catting a UInt of width 0 leads to strange sim results

  ucb-bar/chisel2-deprecated#697 · Filter by author da-steve101 opened on Apr 26, 2016
  1

• Compilation Error when assigning from other clock

  ucb-bar/chisel2-deprecated#696 · Filter by author da-steve101 opened on Apr 25, 2016
  4

• (Relevant to Enum:) Uppercase identifiers assumed to be stable identifiers in extractor/unapply context

  DocumentationSyntax
  ucb-bar/chisel2-deprecated#694 · Filter by author sdtwigg opened on Apr 15, 2016

• Testers Vec size issue: java.lang.IndexOutOfBoundsException

  ucb-bar/chisel2-deprecated#692 · Filter by author hqjenny opened on Apr 13, 2016
  2

• Chisel.TestApplicationException: test application exit - exit code 139

  ucb-bar/chisel2-deprecated#689 · Filter by author ascenium opened on Apr 11, 2016
  4

• Warning message needed?

  ucb-bar/chisel2-deprecated#686 · Filter by author da-steve101 opened on Mar 26, 2016

• Cocotb directives in Verilog backend

  ucb-bar/chisel2-deprecated#674 · Filter by author Martoni opened on Mar 10, 2016
  2