verilog-a

An innovative Verilog-A compiler

微电子和集成电路自学指南

Verilog-A simulation models

The codes are used to generate the VerilogA code which can be directly used in the spectre simulation .The generated VerilogA code's fuction is to generate the specific waveforms according to your setting.And the setting is done in the python code (main.py), which will facilitate greatly the coding works.

A simple MOSFET model for analog/RF IC design and simulation

Verilog-A model library for photonic devices and components used in electronics-photonics co-simulation

Modern Analog and Mixed-Signal Electronic Circuit Simulator that runs on on the desktop and in the browser

HfO2 Ferroelectric Capacitor VerilogA Compact Model for Circuit Simulation

A well-posed RRAM SPICE model implemented in Verilog-A, based on Stanford/ASU filamentary model, using code developed at UC Berkeley

Python tools for generating and testing SPICE netlists/waveforms involving crossbar memory arrays in various configurations

Some ramblings about my major. 一些有关我的专业的碎碎念

A fast generative model for stochastic memory cells

Library of Verilog-A models

A digital genetic algorithm processor

Generates verilogA testbench (stimulus and waveforms) for verification of analog IPs (VLSI design)

Language support in Visual Studio Code for Verilog-A

defunct. use repo on savannah

Open-source TCAD for SkyWater Sky130 calibrated against measured silicon from 300 K to 77 K - drift-diffusion, dopant freeze-out, cryogenic SS saturation quantified, OpenVAF/ngspice compact-model loop

Python Automatic Device Model Synthesizer

A bidirectional netlist parser built on Lark, enabling translation between SPICE-family circuit netlist formats (HSPICE, Xyce, Spectre, Spectre-SPICE) and Verilog-AMS.