finfet

This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.

Design and simulation of a 3D Spacer SOI-FinFET using Silvaco ATLAS, including source code and device parameter extraction.

This repository contains the Synopsys Sentaurus TCAD project files, scripts, and simulation setup for modeling a Dual Material Gate Junctionless FinFET (DMG-JLFET). The work includes structure creation in Sentaurus Structure Editor, implementation of suitable physical models in the device simulation (sdevice) script, and automation of performance.

Bandgap Reference Circuit Design in ASAP 7nm FinFET Technology with Temperature Compensation

FinFET Registers - Instituto de Informática da UFRGS

Memristor Read & Write Analysis

7 Nanometer FinFET based spiking neurons. Utilizing the Leaky Integrate and Fire, Axon-Hillock, and Morric-Lecar models; this repository serves to lay the foundation for further research in small scale artificial neurons. Custom spice models and helpful python tools are included.

COMSOL Multiphysics simulations of planar MOSFET, 3D FinFET, and Gate-All-Around FET (GAAFET) with carrier concentration and electrical characteristic analysis.

A web based tool to plot radiation curve of FINFET model

7nm FinFET Device and Circuit Characterization using ASAP7 PDK, Xschem and Ngspice

Transistor-level design and characterization in ASAP7 7nm FinFET: a dual-Vt domino AND8 (11% leakage reduction) and 6T vs 8T SRAM bitcells across read, write, and hold. Includes a measurement-setup discrepancy found in the original decks.

This repository documents my work on 7nm FinFET circuit design and characterization using the ASAP7 PDK, Ngspice, and Xschem, including CMOS inverter and bandgap reference simulations

Layout-level area reduction of a 22 nm 6T FinFET SRAM bitcell using coordinated lateral geometric compaction, verified with KLayout and Coventor SEMulator3D

Interactive 3D models of FinFET, nanosheet, forksheet and CFET transistors, with a CMOS inverter cell and layout figure in each architecture. WebGL viewer, installable PWA, and an Android app.