axi4-stream

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Parametric FIR filter IP core in SystemVerilog. Transposed direct-form, AXI4-Stream, bit-exact vs scipy.signal.lfilter. For DSP/SDR/audio/ML.

audio fpga dsp verilog sdr systemverilog fixed-point fir yosys fir-filter verilator ip-core axi4-stream

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