Realtime Audio Processing on Artix-7 FPGA written in VHDL
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Updated
Nov 18, 2022 - VHDL
Realtime Audio Processing on Artix-7 FPGA written in VHDL
Implementación hardware VHDL de la Máquina Enigma sobre FPGA Artix-7 (Basys 3). Incluye aritmética modular, lógica de rotores electromecánicos y datapath dedicado.
This project implements a fully functional UART transmitter that divides the Basys 3's 100 MHz system clock down to a 9600 baud timing reference, builds 10-bit UART frames, and continuously transmits an ASCII message over the onboard USB-UART bridge.
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