Analysis-of-CWE

syzkaller is an unsupervised coverage-guided kernel fuzzer

Read physical memory from other virtual machines using CPU vulnerabilities

Binary Utils for Zen Microcode

Fil-C: completely compatible memory safety for C and C++

i8080 precise replica in Verilog, based on reverse engineering of real die

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

RSD: RISC-V Out-of-Order Superscalar Processor

A tiny Open POWER ISA softcore written in VHDL 2008

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation…

Exploring gate level simulation

32-bit Superscalar RISC-V CPU

Paranoid's library contains implementations of checks for well known weaknesses on cryptographic artifacts.

Unsigned code loader for Amlogic BootROM

kCTF is a Kubernetes-based infrastructure for CTF competitions. For documentation, see

End-To-End is a crypto library to encrypt, decrypt, digital sign, and verify signed messages (implementing OpenPGP)

E2EMail is a simple Chrome application - a Gmail client that exchanges OpenPGP mail.

Counterparty web wallet

OpenCheck es una plataforma web y móvil para conectar establecimientos (restaurants/bars y retail stores) con clientes on-the-go.

The new version of aMSN client

The new version of aMSN client