Skip to content

gh-121201: Support riscv64 architecture for Perf JIT #121387

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
furkanonder wants to merge 1 commit into
base: main
Choose a base branch
from
Open

gh-121201: Support riscv64 architecture for Perf JIT #121387

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Support riscv64 architecture for Perf JIT
  • Loading branch information
@furkanonder
furkanonder committed Jul 4, 2024
commit 755c8b1953b78a8d0ce8b81c26ec29df66f3ccd3
5 changes: 4 additions & 1 deletion Python/perf_jit_trampoline.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -371,6 +371,9 @@ enum {
#elif defined(__aarch64__) && defined(__AARCH64EL__) && !defined(__ILP32__)
DWRF_REG_SP = 31,
DWRF_REG_RA = 30,
#elif defined(__riscv)
DWRF_REG_RA = 1,
DWRF_REG_SP = 2,
#else
# error "Unsupported target architecture"
#endif
Expand Down Expand Up @@ -477,7 +480,7 @@ elf_init_ehframe(ELFObjectContext* ctx)
DWRF_U8(DWRF_CFA_advance_loc | 6);
DWRF_U8(DWRF_CFA_def_cfa_offset); DWRF_UV(8);
/* Extra registers saved for JIT-compiled code. */
#elif defined(__aarch64__) && defined(__AARCH64EL__) && !defined(__ILP32__)
#elif (defined(__aarch64__) && defined(__AARCH64EL__) && !defined(__ILP32__)) || defined(__riscv)
DWRF_U8(DWRF_CFA_advance_loc | 1);
DWRF_U8(DWRF_CFA_def_cfa_offset); DWRF_UV(16);
DWRF_U8(DWRF_CFA_offset | 29); DWRF_UV(2);
Expand Down