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gh-117657: Fix TSAN reported race in _PyEval_IsGILEnabled. (GH-119921)
The GIL may be disabled concurrently with this call so we need to use a
relaxed atomic load.
(cherry picked from commit f3b89a6)

Co-authored-by: Sam Gross <colesbury@gmail.com>
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colesbury authored and miss-islington committed Jun 2, 2024
commit 7dc0140c9ede1516aeb9634ef966166ee6ca1a57
3 changes: 2 additions & 1 deletion Include/internal/pycore_ceval.h
Original file line number Diff line number Diff line change
Expand Up @@ -145,7 +145,8 @@ extern void _PyEval_ReleaseLock(PyInterpreterState *, PyThreadState *,
static inline int
_PyEval_IsGILEnabled(PyThreadState *tstate)
{
return tstate->interp->ceval.gil->enabled != 0;
struct _gil_runtime_state *gil = tstate->interp->ceval.gil;
return _Py_atomic_load_int_relaxed(&gil->enabled) != 0;
}

// Enable or disable the GIL used by the interpreter that owns tstate, which
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1 change: 0 additions & 1 deletion Tools/tsan/suppressions_free_threading.txt
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,6 @@ race_top:list_get_item_ref
race_top:make_pending_calls
race_top:set_add_entry
race_top:should_intern_string
race_top:_PyEval_IsGILEnabled
race_top:llist_insert_tail
race_top:_Py_slot_tp_getattr_hook
race_top:add_threadstate
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