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OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Verilog 3,233 1,063 Updated Oct 27, 2026

Scala based HDL

Scala 2,053 396 Updated Oct 26, 2026

Issue tracker for Metals feature requests

39 6 Updated Oct 1, 2026

The batteries-included testing and formal verification library for Chisel-based RTL designs.

Scala 234 74 Updated Aug 19, 2024

Chisel: A Modern Hardware Design Language

Scala 4,821 663 Updated Oct 27, 2026

reStructuredText Language Support in Visual Studio Code

TypeScript 366 93 Updated Apr 1, 2026

The Zylin ZPU

VHDL 254 34 Updated Apr 21, 2015