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Closing as superseded by #43, which integrated the complete Smart Control C1–C5 line onto current |
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Scope
Stacked on Phase 4D-C4. Add the laboratory interoperability harness and retained-evidence procedure needed to move guarded IEC 61850 control from software parity to controlled live-IED validation. Sampled Values / ESP32-P4 work remains out of scope.
Guarded live harness
tools/control_interop_probe.cpp--arm IEC61850-LAB-CONTROLMmsAssociationControlTransportoperate,select-operate, andselect-cancellaboratory actionsctlModel, exact GVAA/TypeSpecification, CF timeouts and ST/MX status before controlDiscovery companions
ctlModeldiagnostic probectlModelevidence distinguishes actualstatus-onlyvalues from decoder/representation gapsEvidence
NO_RETRY_EVIDENCEon stdoutSafety / usability
--self-testproves read-only default + arm gate + no-auto-retry contractscripts/build_control_interop.ps1provides a one-command Windows/MSVC build + CTest path.exetogether with the self-test/help contractDocumentation truth synchronized
PORT_STATUS.mdadvances the current milestone to C5MIGRATION_CHECKLIST.mdreflects implemented BRCB R1-R3 and Control C1-C5MIGRATION_PLAN.mdidentifies C5 laboratory evidence as the current acceptance phasedocs/FEATURE_MATRIX.mdclassifies Direct/SBO/enhanced control as software-ready for labdocs/CONTROL_INTEROP_RUNBOOK.mddefines build, Wireshark, per-ctlModel test order, expected Write counts, negative paths and retained evidence bundledocs/CONTROL_INTEROP_ACCEPTANCE.mdrecords the completed live simulator matrix and claim boundaryLive simulator acceptance — completed 2026-08-11
Tested profile:
BCU7SL192.168.1.10:102BCU7SLCTRL/CSWI1.PosSPCctlVal: BooleanBCU7SLCTRL/CSWI1$ST$Pos$stValAcceptance matrix:
Operper deliberate actionOperper operate; oneCancelfor cancelOper; correlated positive CommandTermination requiredSBOwthenOper; correlated positive CommandTermination requiredAdditional evidence:
SBOwstopped after exactly one Write; no Oper and no automatic retry followedSpecific tested profile state:
SIMULATOR_INTEROP_PASSED.Full evidence summary and local JSON filenames are recorded in
docs/CONTROL_INTEROP_ACCEPTANCE.md.Validation
Dedicated
Control Interop Harness CIbuilds and runs the offline safety gate on GCC, Clang and Windows/MSVC. The normal repository C++/Security/Embedded/BRCB/URCB gates remain required on the final head.Remaining acceptance boundary
This PR does not claim IEC 61850 conformance certification or physical-relay/primary-plant acceptance. Simulator interoperability has now been demonstrated for all four control models on the tested BCU7SL profile, but separate retained evidence is still required for any physical IED profile, broader vendor matrix, association-loss matrix, and exhaustive negative LastApplError/AddCause coverage.