Like VexRiscv, but, Harder, Better, Faster, Stronger

RISCV lock-step checker based on Spike

Spike, a RISC-V ISA Simulator

Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.

Scala based HDL

Monorepo containing a machine-readable database of the RISC-V specification and artifact generation tools

RISC-V Opcodes

The sources of the online SpinalHDL doc

Linux kernel source tree

LiteX boards files

Small footprint and configurable Ethernet core

A modern web UI for various torrent clients with a Node.js backend and React frontend.

RISC-V Instruction Set Manual

Python extension for Visual Studio Code

SOPHGO RISC-V Zero Stage BootLoader

Linux Kernel Performance tests

Apache NuttX is a mature, real-time embedded operating system (RTOS)

Linux kernel stable tree

RV-Debugger-BL702 Project, an opensource debugger implement

fsbl project for cv18xx series soc.

Small, fast and powerful console music player for Unix-like operating systems.

Python module containing verilog files for rocket cpu (for use with LiteX).

DIGImend graphics tablet drivers for the Linux kernel