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Use read-only atomic load before swap in check_signals
Add Relaxed load guard before the Acquire swap to avoid cache-line
invalidation on every instruction dispatch when no signal is pending.
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youknowone committed Mar 1, 2026
commit b6760e169a002f4d096d07c08f1c2219549e2b14
6 changes: 6 additions & 0 deletions crates/vm/src/signal.rs
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,12 @@ pub fn check_signals(vm: &VirtualMachine) -> PyResult<()> {
return Ok(());
}

// Read-only check first: avoids cache-line invalidation on every
// instruction when no signal is pending (the common case).
if !ANY_TRIGGERED.load(Ordering::Relaxed) {
return Ok(());
}
// Atomic RMW only when a signal is actually pending.
if !ANY_TRIGGERED.swap(false, Ordering::Acquire) {
return Ok(());
}
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