One-dimensional, physics-based simulation of an ideal metal–SiO₂–p-Si MOS capacitor using Python and DEVSIM. The project combines analytical semiconductor theory with nonlinear Poisson simulation, gate-voltage continuation, quasi-static and high-frequency-limit C–V extraction, parameter sweeps, and quantitative mesh-convergence testing.
Author: Gan N. H.
Programme: Bachelor of Science in Physics, Universiti Malaya
Validated platform: Python 3.13, DEVSIM 2.10.1, Windows 11
Status: Full automated workflow passed
- Nonuniform one-dimensional finite-volume mesh with SiO₂/Si interface refinement.
- Self-consistent nonlinear Poisson solution with Maxwell–Boltzmann carrier statistics.
- Gate sweep from accumulation through depletion to strong inversion.
- Quasi-static and high-frequency-limit C–V characteristics.
- Analytical validation of oxide capacitance, Fermi potential, threshold voltage, maximum depletion width, and minimum capacitance.
- Controlled sweeps of oxide thickness, substrate doping, and temperature.
- Four-level mesh-convergence study with quantitative pass/fail gates.
- Machine-readable CSV and JSON outputs plus publication-quality figures.
- A single command that runs and validates the complete workflow.
The simulated structure is an ideal one-dimensional metal–oxide–semiconductor stack with a uniformly doped p-type silicon substrate.
| Parameter | Baseline value |
|---|---|
| Temperature | 300 K |
| Acceptor concentration, |
|
| Silicon thickness | 2.0 µm |
| SiO₂ thickness, |
10 nm |
| Relative permittivity of silicon | 11.7 |
| Relative permittivity of SiO₂ | 3.9 |
| Intrinsic carrier concentration | |
| Metal–semiconductor work-function difference | 0 V |
| Fixed oxide charge | 0 |
| Gate-voltage range | −2.0 to +2.0 V |
| Gate-voltage step | 0.05 V |
| High-frequency label | 1.0 MHz |
The electrostatic solution is obtained from Poisson's equation,
with equilibrium carrier concentrations described using Maxwell–Boltzmann statistics. The principal analytical reference quantities are
and
The quasi-static capacitance is extracted numerically from the gate-charge response. The high-frequency result is a classical frozen-minority-carrier limiting curve constructed from the TCAD electrostatic depletion response; the 1 MHz value is a descriptive label, not a frequency-dispersive AC transport calculation.
silicon-mos-capacitor-tcad/
├── config/ Simulation configurations
├── docs/
│ └── technical_report.md Detailed methods and discussion
├── results/ CSV, JSON, figures, and workflow manifest
├── src/
│ ├── analytical_reference.py
│ ├── tcad_electrostatics.py
│ ├── tcad_cv.py
│ ├── tcad_oxide_sweep.py
│ ├── tcad_doping_sweep.py
│ ├── tcad_mos_temperature_sweep.py
│ └── tcad_mesh_convergence.py
├── tests/
├── .gitignore
├── LICENSE
├── README.md
├── requirements.txt
└── run_all.py Complete automated workflow
The commands below are for Windows PowerShell from the project root.
py -3.13 -m venv .venv
.\.venv\Scripts\Activate.ps1
python -m pip install --upgrade pip
python -m pip install -r requirements.txtIf PowerShell blocks virtual-environment activation, either use PyCharm's configured .venv interpreter directly or activate from Command Prompt with:
.venv\Scripts\activate.batConfirm that DEVSIM is available:
python -c "import devsim; print('DEVSIM import: OK')"On Windows, the simulation scripts automatically add the active environment's Library\bin directory when locating the MKL runtime installed by the mkl package.
Run and validate every stage:
python run_all.pyThe expected final messages are:
FULL MOS TCAD WORKFLOW: PASSED
Process finished with exit code 0
Validate existing outputs without rerunning the simulations:
python run_all.py --validate-onlyIndividual studies may also be executed directly:
python src\analytical_reference.py
python src\tcad_electrostatics.py
python src\tcad_cv.py
python src\tcad_oxide_sweep.py
python src\tcad_doping_sweep.py
python src\tcad_mos_temperature_sweep.py
python src\tcad_mesh_convergence.py| Quantity | TCAD | Analytical | Relative error |
|---|---|---|---|
| Threshold voltage | 0.855775 V | 0.855334 V | 0.0516% |
| High-frequency minimum capacitance | 31.0452 nF/cm² | 31.0227 nF/cm² | 0.0723% |
| Maximum depletion width at threshold | 0.297332 µm | 0.303929 µm | 2.17% |
| Oxide capacitance density | 345.313 nF/cm² | 345.313 nF/cm² | — |
Additional electrostatic checks passed with a flat-band surface-potential error of approximately
The oxide thickness is varied through 5, 10, and 20 nm while other baseline conditions are fixed. The study verifies
The acceptor concentration is varied through
The temperature is varied through 250, 300, and 350 K. Increasing temperature raises the intrinsic carrier concentration and reduces
Four progressively refined interface meshes—4, 2, 1, and 0.5 nm—were compared against the finest case.
| Mesh-convergence metric | Maximum deviation from finest mesh |
|---|---|
| Threshold voltage | 0.0393% |
| Maximum depletion width | 0.0794% |
| Minimum capacitance | 0.0171% |
| Full high-frequency C–V RMS | 0.9733% |
| Study | Main quantitative gate | Status |
|---|---|---|
| Baseline electrostatics | Analytical threshold and neutrality checks | Passed |
| Baseline C–V |
|
Passed |
| Oxide sweep | Maximum threshold error 0.0516% | Passed |
| Doping sweep | Maximum threshold error 0.1224% | Passed |
| Temperature sweep | Maximum threshold error 0.0666% | Passed |
| Mesh convergence | Full-curve RMS deviation 0.9733% | Passed |
The complete run produces results/workflow_manifest.json, which records the stage status and verifies that all expected artifacts are present.
This project is a classical, idealized MOS-capacitor study intended for physics education, numerical-method verification, and a reproducible TCAD portfolio. Current assumptions include:
- one-dimensional planar geometry;
- uniform p-type substrate doping;
- ideal metal/oxide and oxide/silicon interfaces;
- zero fixed oxide charge and zero work-function difference;
- Maxwell–Boltzmann rather than degenerate carrier statistics;
- no quantum confinement, interface traps, oxide leakage, breakdown, or mobile ionic charge;
- a high-frequency frozen-minority-carrier limit rather than a fully frequency-dispersive small-signal transport solution.
These assumptions should be reconsidered before using the model for process calibration or fabrication-level prediction.
- J. E. Sanchez, “DEVSIM: A TCAD Semiconductor Device Simulator,” Journal of Open Source Software, vol. 7, no. 74, p. 3898, 2022. doi:10.21105/joss.03898
- DEVSIM official repository
- S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2006.
- R. F. Pierret, Semiconductor Device Fundamentals, Addison-Wesley, 1996.
This project is released under the MIT License.