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[MLIR] Numpy empty and sum axis #187

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Hardcode84 merged 15 commits into from
Feb 21, 2021
Merged

[MLIR] Numpy empty and sum axis #187

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5981ec0
store context in Var
Feb 20, 2021
d53b90f
rework shape accessor
Feb 20, 2021
71b35c4
dtype accessor rework
Feb 20, 2021
437ac11
remove unused code
Feb 20, 2021
24fb1b5
refactor shape
Feb 20, 2021
ba50774
remove unused code
Feb 20, 2021
42a0964
fix setitem lowering
Feb 20, 2021
48b2758
numpy empty
Feb 20, 2021
b3a2105
numpy.sum
Feb 20, 2021
1bec4ad
some kwargs support
Feb 20, 2021
5712278
linlag resolver kwargs support
Feb 20, 2021
75dfc8b
linalg resolver some literal support
Feb 20, 2021
8557f0f
work on linalg resolver
Feb 20, 2021
a1bb470
add symbolDCE pass
Feb 20, 2021
1c25bf6
numpy sum axis support
Feb 20, 2021
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fix setitem lowering
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Butygin
Butygin committed Feb 20, 2021
commit 42a0964733c2cf99a761cfa1e75bde8561926898
3 changes: 2 additions & 1 deletion mlir-compiler/mlir-compiler/src/pipelines/plier_to_linalg.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -436,7 +436,7 @@ struct SetitemOpLowering : public mlir::OpRewritePattern<T>
mlir::OpBuilder::InsertionGuard g(rewriter);
if (auto parent_op = target.getDefiningOp())
{
rewriter.setInsertionPoint(parent_op);
rewriter.setInsertionPointAfter(parent_op);
}
else
{
Expand All @@ -456,6 +456,7 @@ struct SetitemOpLowering : public mlir::OpRewritePattern<T>
}
else
{
mlir::OpBuilder::InsertionGuard g(rewriter);
rewriter.setInsertionPoint(use_op);
auto new_val = rewriter.create<mlir::TensorLoadOp>(use_op->getLoc(), memref);
rewriter.updateRootInPlace(use_op, [&]()
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