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Enable architecture selection for DPCTL_TARGET_CUDA #2096

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Merged
ndgrigorian merged 17 commits into from
Jun 19, 2025
Merged

Enable architecture selection for DPCTL_TARGET_CUDA #2096

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bae5f3d
Clean up DPCTL_TARGET_CUDA handling
vlad-perevezentsev Jun 4, 2025
de83f29
Ver 1: Add sm_* offload arch support to DPCTL_TARGET_CUDA
vlad-perevezentsev Jun 5, 2025
9751a71
Ver 2: Use nvidia_gpu_sm_* alias in -fsycl-targets for CUDA
vlad-perevezentsev Jun 5, 2025
4a3ecf8
Update CUDA build docs
vlad-perevezentsev Jun 5, 2025
58710ed
Merge master into update_cuda_build
vlad-perevezentsev Jun 5, 2025
80f7bc7
Improve robustness of DPCTL_TARGET_CUDA handling
vlad-perevezentsev Jun 5, 2025
d395910
Update DPCTL_TARGET_CUDA option description
vlad-perevezentsev Jun 5, 2025
758e00f
Apply remarks
vlad-perevezentsev Jun 6, 2025
155ca52
Merge master into update_cuda_build
vlad-perevezentsev Jun 6, 2025
feee948
Use string(CONCAT) for multi-line DPCTL_TARGET_CUDA description
vlad-perevezentsev Jun 6, 2025
44f80a2
Enable false value support for DPCTL_TARGET_CUDA
vlad-perevezentsev Jun 10, 2025
2843aaa
Use \ instead of string(CONCAT)
vlad-perevezentsev Jun 10, 2025
53f1fc0
Merge master into update_cuda_build
vlad-perevezentsev Jun 10, 2025
98196d7
Clarify SYCL target selection and add CUDA/AMD/Multi-target subchapters
vlad-perevezentsev Jun 17, 2025
2ee05d2
Merge master into update_cuda_build
vlad-perevezentsev Jun 17, 2025
21ec5c2
Merge master into update_cuda_build
vlad-perevezentsev Jun 18, 2025
5bf20fd
Merge origin into update_cuda_build
vlad-perevezentsev Jun 18, 2025
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Ver 1: Add sm_* offload arch support to DPCTL_TARGET_CUDA
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@vlad-perevezentsev
vlad-perevezentsev committed Jun 5, 2025
commit de83f29010649e5805478bc8f474b97af503448e
24 changes: 20 additions & 4 deletions CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -25,9 +25,10 @@ option(DPCTL_GENERATE_COVERAGE_FOR_PYBIND11_EXTENSIONS
"Build dpctl pybind11 offloading extensions with coverage instrumentation"
OFF
)
option(DPCTL_TARGET_CUDA
"Build DPCTL to target CUDA devices"
OFF
set(DPCTL_TARGET_CUDA
""
CACHE STRING
"Build DPCTL to target CUDA devices. Set to ON to use default architecture (sm_50), or to a specific architecture like sm_80."
)
set(DPCTL_TARGET_HIP
""
Expand All @@ -51,9 +52,20 @@ set(_dpctl_sycl_target_compile_options)
set(_dpctl_sycl_target_link_options)

set(_dpctl_sycl_targets)
set(_dpctl_cuda_arch)
set(_dpctl_amd_targets)
if ("x${DPCTL_SYCL_TARGETS}" STREQUAL "x")
if (DPCTL_TARGET_CUDA)
if (NOT "x${DPCTL_TARGET_CUDA}" STREQUAL "x")
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if (DPCTL_TARGET_CUDA STREQUAL "ON")
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set(_dpctl_cuda_arch "sm_50")
elseif(DPCTL_TARGET_CUDA MATCHES "^sm_")
set(_dpctl_cuda_arch ${DPCTL_TARGET_CUDA})
else()
message(FATAL_ERROR
"Invalid value for DPCTL_TARGET_CUDA: \"${DPCTL_TARGET_CUDA}\". "
"Expected 'ON' or an architecture like 'sm_80'."
)
endif()
set(_dpctl_sycl_targets "nvptx64-nvidia-cuda,spir64-unknown-unknown")
endif()
if (NOT "x${DPCTL_TARGET_HIP}" STREQUAL "x")
Expand Down Expand Up @@ -88,6 +100,10 @@ if (_dpctl_sycl_targets)
message(STATUS "Compiling for -fsycl-targets=${_dpctl_sycl_targets}")
list(APPEND _dpctl_sycl_target_compile_options -fsycl-targets=${_dpctl_sycl_targets})
list(APPEND _dpctl_sycl_target_link_options -fsycl-targets=${_dpctl_sycl_targets})
if (_dpctl_cuda_arch)
list(APPEND _dpctl_sycl_target_compile_options -Xsycl-target-backend=nvptx64-nvidia-cuda --offload-arch=${_dpctl_cuda_arch})
list(APPEND _dpctl_sycl_target_link_options -Xsycl-target-backend=nvptx64-nvidia-cuda --offload-arch=${_dpctl_cuda_arch})
endif()
if(_dpctl_amd_targets)
list(APPEND _dpctl_sycl_target_compile_options -Xsycl-target-backend=amdgcn-amd-amdhsa --offload-arch=${_dpctl_amd_targets})
list(APPEND _dpctl_sycl_target_link_options -Xsycl-target-backend=amdgcn-amd-amdhsa --offload-arch=${_dpctl_amd_targets})
Expand Down