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x86 architecture
stack frames




🅴XTINCT



 
PUSHA and POPA
 
16-bit
AX
CX
DX
BX
    SP #1
BP
SI
DI
32-bit
EAX
ECX
EDX
EBX
    ESP #1
EBP
ESI
EDI
note #1 pre-PUSHA value, discarded by POPA
 
 
interrupt or trap gate
 
16-bit
    GS #1
    FS #1
    DS #1
    ES #1
    SS #2
    SP #2
FLAGS
CS
IP
    error code #3
32-bit
reserved     GS #1
reserved     FS #1
reserved     DS #1
reserved     ES #1
reserved     SS #2
    ESP #2
EFLAGS
reserved CS
EIP
    reserved #4     error code #3
64-bit
    pushed for FRED – reserved     #5
    pushed for FRED – event data  #5
reserved     reserved #5 SS
RSP
RFLAGS
reserved     reserved #5 CS
RIP
reserved     reserved #4     error code #3
notes #1 only if transfer from virtual mode
#2 only if transfer from different CPL
#3 only #DF, #TS, #NP, #SS, #GP, #PF, #AC, #CP or AMD #VC, #SX
#4 for AMD the error code is 32 bits since #PF(RMP) resides at bit 31
#5 for full details, see FRED instead
 
 
call gate
 
16-bit
    SS #1
    SP #1
PARAMETER 1
    ... #2
PARAMETER 31
CS
IP
32-bit
reserved     SS #1
    ESP #1
PARAMETER 1
    ... #2
PARAMETER 31
reserved CS
EIP
64-bit
reserved reserved     SS #1
    RSP #1
reserved reserved CS
RIP
notes #1 only if transfer from different CPL
#2 only if PARAMCOUNT field is non-zero



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