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| 1 | +# wolfBoot configuration for AMD Versal - DDR Boot with a high DDR aperture |
| 2 | +# Versal with DDR mapped at 0x400_0000_0000 instead of the default map. |
| 3 | +# |
| 4 | +# This configuration replaces U-Boot in the Versal boot flow: |
| 5 | +# PLM -> PSM -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1) |
| 6 | +# |
| 7 | +# Derived from versal_vmk180.config; see that file for the knobs this one |
| 8 | +# does not change. Every address here lives inside the aperture declared by |
| 9 | +# VERSAL_DDR_HIGH_BASE/SIZE, which is what generates the translation-table |
| 10 | +# entries covering it. All clock, MIO and DDR initialization is done by |
| 11 | +# PLM/PSM before wolfBoot starts. |
| 12 | +# |
| 13 | +# Three things outside this file have to agree with it: |
| 14 | +# - the bootgen BIF: wolfboot.elf at WOLFBOOT_ORIGIN, and the raw DTB |
| 15 | +# partition at WOLFBOOT_LOAD_DTS_ADDRESS |
| 16 | +# - BL31's BL33 entry (PRELOADED_BL33_BASE) = WOLFBOOT_ORIGIN |
| 17 | +# - the FIT ITS: #address-cells = <2>, because a single cell cannot hold |
| 18 | +# an address above 4 GB |
| 19 | + |
| 20 | +ARCH?=AARCH64 |
| 21 | +TARGET?=versal |
| 22 | + |
| 23 | +WOLFBOOT_VERSION?=1 |
| 24 | + |
| 25 | +# ECC-384 with SHA-384 (good balance of security and performance) |
| 26 | +SIGN?=ECC384 |
| 27 | +HASH?=SHA384 |
| 28 | +IMAGE_HEADER_SIZE?=512 |
| 29 | + |
| 30 | +# RSA 4096-bit with SHA3-384 (alternative) |
| 31 | +#SIGN?=RSA4096 |
| 32 | +#HASH?=SHA3 |
| 33 | +#IMAGE_HEADER_SIZE?=1024 |
| 34 | + |
| 35 | +# Debug options |
| 36 | +DEBUG?=1 |
| 37 | +DEBUG_SYMBOLS=1 |
| 38 | +DEBUG_UART=1 |
| 39 | + |
| 40 | +# Boot Benchmarking (optional): |
| 41 | +# Enables timing of boot operations (flash read, integrity, signature). |
| 42 | +BOOT_BENCHMARK?=1 |
| 43 | + |
| 44 | +VTOR?=1 |
| 45 | +CORTEX_M0?=0 |
| 46 | +NO_ASM?=0 |
| 47 | +ALLOW_DOWNGRADE?=0 |
| 48 | +NVM_FLASH_WRITEONCE?=0 |
| 49 | +V?=0 |
| 50 | +SPMATH?=1 |
| 51 | +RAM_CODE?=0 |
| 52 | +DUALBANK_SWAP?=0 |
| 53 | +PKA?=0 |
| 54 | +WOLFTPM?=0 |
| 55 | + |
| 56 | +# Flash configuration |
| 57 | +EXT_FLASH?=1 |
| 58 | +NO_XIP=1 |
| 59 | + |
| 60 | +# Boot Exception Level |
| 61 | +# Choose the exception level for booting applications (mutually exclusive): |
| 62 | +# BOOT_EL1: Transition applications to EL1 (default - for Linux, most bare-metal) |
| 63 | +# BOOT_EL2: Boot applications at EL2 (for hypervisors, RTOSes that expect EL2) |
| 64 | +# Default is BOOT_EL1 if neither is specified. |
| 65 | +# Uncomment one of the following to override: |
| 66 | +#BOOT_EL1=1 |
| 67 | +#BOOT_EL2=1 |
| 68 | + |
| 69 | +# ELF loading support |
| 70 | +ELF?=1 |
| 71 | + |
| 72 | +# Native gzip decompression for FIT subimages (set GZIP=0 to disable) |
| 73 | +GZIP?=1 |
| 74 | + |
| 75 | +# FIT ramdisk (initramfs) extraction plus the /chosen/linux,initrd-{start,end} |
| 76 | +# fixup. A stock PetaLinux image.ub carries a ramdisk sub-image that a U-Boot |
| 77 | +# "bootm" loads; without this wolfBoot ignores it. |
| 78 | +FIT_RAMDISK?=1 |
| 79 | + |
| 80 | +# WOLFBOOT_LOAD_KERNEL_ADDRESS / WOLFBOOT_LOAD_RAMDISK_ADDRESS override the |
| 81 | +# FIT's own `load`/`entry`, which is what lets a FIT built without them boot |
| 82 | +# at all (Yocto omits both unless UBOOT_LOADADDRESS/UBOOT_ENTRYPOINT are |
| 83 | +# set). Both are set in the DDR layout below. |
| 84 | + |
| 85 | +# Toolchain |
| 86 | +USE_GCC=1 |
| 87 | +CROSS_COMPILE=aarch64-none-elf- |
| 88 | + |
| 89 | +# ============================================================================ |
| 90 | +# Boot Memory Layout |
| 91 | +# ============================================================================ |
| 92 | +# wolfBoot runs from DDR inside the high aperture, at EL2 non-secure. |
| 93 | +# WOLFBOOT_ORIGIN is set with the rest of the layout further down - the |
| 94 | +# bootgen BIF partition header and BL31's PRELOADED_BL33_BASE must both |
| 95 | +# name that same address, not the 0x8000000 the default-map configs use. |
| 96 | + |
| 97 | +# Optional debugging with OCRAM |
| 98 | +# Versal Gen 1 (VMK180): OCM is 256KB at 0xFFFC0000 - 0xFFFFFFFF |
| 99 | +# Versal Gen 2: OCM is 2MB at 0xFFE00000 - 0xFFFFFFFF |
| 100 | +#WOLFBOOT_ORIGIN=0xFFFC0000 |
| 101 | + |
| 102 | +# Flash Sector Size (QSPI) |
| 103 | +WOLFBOOT_SECTOR_SIZE=0x20000 |
| 104 | + |
| 105 | +# Application Partition Size (44MB) |
| 106 | +WOLFBOOT_PARTITION_SIZE=0x2C00000 |
| 107 | + |
| 108 | +# Location in Flash for Primary Boot Partition |
| 109 | +WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x800000 |
| 110 | + |
| 111 | +# Load Partition to RAM Address (Linux kernel loads here) |
| 112 | +WOLFBOOT_LOAD_ADDRESS?=0x10000000 |
| 113 | + |
| 114 | +# Location in Flash for Secondary Partition (update image) |
| 115 | +WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x3400000 |
| 116 | + |
| 117 | +# Location to store wolfBoot state/swap |
| 118 | +WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x6000000 |
| 119 | + |
| 120 | +# DTS (Device Tree) - matches addresses from BOOT.BIN analysis |
| 121 | +WOLFBOOT_LOAD_DTS_ADDRESS?=0x1000 |
| 122 | + |
| 123 | +# The aperture itself. Base and size are 512 GB aligned with no UL/ULL |
| 124 | +# suffix, because the assembler consumes them when it builds the |
| 125 | +# translation tables. VERSAL_NO_DDR_LOW drops the default low-DDR mapping |
| 126 | +# for parts that have none. |
| 127 | +CFLAGS_EXTRA+=-DVERSAL_DDR_HIGH_BASE=0x40000000000 |
| 128 | +CFLAGS_EXTRA+=-DVERSAL_DDR_HIGH_SIZE=0x10000000000 |
| 129 | +CFLAGS_EXTRA+=-DVERSAL_NO_DDR_LOW |
| 130 | + |
| 131 | +# DDR layout inside the aperture. These use '=' so they override the '?=' |
| 132 | +# defaults above. Each region is distinct: the kernel and ramdisk |
| 133 | +# destinations clear the FIT staging buffer at WOLFBOOT_LOAD_ADDRESS, |
| 134 | +# because the sub-images are read out of it while they are being written, |
| 135 | +# and a destination that overlaps the staging buffer or wolfBoot itself |
| 136 | +# hangs partway through the copy. |
| 137 | +# |
| 138 | +# 0x400_0000_1000 DTB (WOLFBOOT_LOAD_DTS_ADDRESS) |
| 139 | +# 0x400_0080_0000 wolfBoot (WOLFBOOT_ORIGIN) |
| 140 | +# 0x400_0200_0000 kernel (WOLFBOOT_LOAD_KERNEL_ADDRESS) |
| 141 | +# 0x400_1000_0000 FIT staging (WOLFBOOT_LOAD_ADDRESS) |
| 142 | +# 0x400_3000_0000 ramdisk (WOLFBOOT_LOAD_RAMDISK_ADDRESS) |
| 143 | +WOLFBOOT_ORIGIN=0x40000800000 |
| 144 | +WOLFBOOT_LOAD_DTS_ADDRESS=0x40000001000 |
| 145 | +WOLFBOOT_LOAD_KERNEL_ADDRESS=0x40002000000 |
| 146 | +WOLFBOOT_LOAD_ADDRESS=0x40010000000 |
| 147 | +WOLFBOOT_LOAD_RAMDISK_ADDRESS=0x40030000000 |
| 148 | +WOLFBOOT_DTS_BOOT_ADDRESS?=0x7B0000 |
| 149 | +WOLFBOOT_DTS_UPDATE_ADDRESS?=0x39B0000 |
| 150 | + |
| 151 | +# Speed up reads by using larger blocks |
| 152 | +CFLAGS_EXTRA+=-DWOLFBOOT_SHA_BLOCK_SIZE=4096 |
| 153 | + |
| 154 | +# UART Configuration - UART0 for APU console |
| 155 | +CFLAGS_EXTRA+=-DDEBUG_UART_NUM=0 |
| 156 | + |
| 157 | +# QSPI Reference Clock: Ref (300MHz default for Versal) |
| 158 | +#CFLAGS_EXTRA+=-DGQSPI_CLK_REF=300000000 |
| 159 | + |
| 160 | +# QSPI Bus Divisor: (2 << div) = BUS (0=div2, 1=div4, 2=div8) |
| 161 | +# MT25QU01G max: 133MHz Quad Read (0x6C) with 8 dummy cycles |
| 162 | +# div=0: 300MHz/2 = 150MHz (above spec but tested working) |
| 163 | +# div=1: 300MHz/4 = 75MHz (within spec, default) |
| 164 | +# div=2: 300MHz/8 = 37.5MHz (conservative) |
| 165 | +#CFLAGS_EXTRA+=-DGQSPI_CLK_DIV=1 |
| 166 | + |
| 167 | +# QSPI flash options (uncomment to enable) |
| 168 | +#CFLAGS_EXTRA+=-DDEBUG_QSPI # Enable QSPI debug logging |
| 169 | +#CFLAGS_EXTRA+=-DGQSPI_MODE_IO # Use polling instead of DMA (slower) |
| 170 | +#CFLAGS_EXTRA+=-DTEST_EXT_FLASH # Run flash erase/write/read test |
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