Skip to content

Commit c8a6db6

Browse files
author
Matthew Wahab
committed
[AArch64][PATCH 1/2] Add support for RAS instruction ESB.
The ARMv8.2 RAS extension adds a new barrier instruction ESB as an alias and the preferred form of HINT 16. This patch adds an architectural feature flag for the RAS extension and includes it in the features selected enabled by -march=armv8.2-a. It also adds the ESB instruction, making it available whenever the RAS feature is enabled. Because ESB is the preferred form and because the target architecture isn't available to the disassembler, HINT 16 will be disassembled as ESB even when the target has no support for the RAS extension. gas/testsuite/ 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/system-2.d: New. * gas/aarch64/system-2.s: New. * gas/aarch64/system.d: Adjust expected output for HINT 16. include/opcode/ 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_RAS): New. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS. opcodes/ 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-tbl.h (aarch64_feature_ras): New. (RAS): New. (aarch64_opcode_table): Add "esb". Change-Id: Id4713917da15cca3b977284f43febd1c9b3d9faf
1 parent af117b3 commit c8a6db6

10 files changed

Lines changed: 68 additions & 25 deletions

File tree

‎gas/testsuite/ChangeLog‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,9 @@
1+
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
2+
3+
* gas/aarch64/system-2.d: New.
4+
* gas/aarch64/system-2.s: New.
5+
* gas/aarch64/system.d: Adjust expected output for HINT 16.
6+
17
2015-12-09 H.J. Lu <hongjiu.lu@intel.com>
28

39
* gas/i386/i386.exp: Run ospke and x86-64-ospke.

‎gas/testsuite/gas/aarch64/system-2.d‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
#as: -march=armv8.2-a
2+
#objdump: -dr
3+
4+
.*: file format .*
5+
6+
Disassembly of section \.text:
7+
8+
0000000000000000 <.*>:
9+
0: d503221f esb
10+
4: d503221f esb

‎gas/testsuite/gas/aarch64/system-2.s‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
/* ARMv8.1 System instructions. */
2+
.text
3+
4+
/* RAS Extension. */
5+
esb
6+
hint #0x10

‎gas/testsuite/gas/aarch64/system.d‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ Disassembly of section \.text:
2828
50: d50321bf hint #0xd
2929
54: d50321df hint #0xe
3030
58: d50321ff hint #0xf
31-
5c: d503221f hint #0x10
31+
5c: d503221f (hint #0x10|esb)
3232
60: d503223f hint #0x11
3333
64: d503225f hint #0x12
3434
68: d503227f hint #0x13

‎include/opcode/ChangeLog‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,8 @@
1+
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
2+
3+
* aarch64.h (AARCH64_FEATURE_RAS): New.
4+
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS.
5+
16
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
27

38
* aarch64.h (AARCH64_FEATURE_F16): Fix clash with

‎include/opcode/aarch64.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@ typedef uint32_t aarch64_insn;
4949
#define AARCH64_FEATURE_RDMA 0x00800000 /* v8.1 SIMD instructions. */
5050
#define AARCH64_FEATURE_V8_1 0x01000000 /* v8.1 features. */
5151
#define AARCH64_FEATURE_F16 0x02000000 /* v8.2 FP16 instructions. */
52+
#define AARCH64_FEATURE_RAS 0x04000000 /* RAS Extensions. */
5253

5354
/* Architectures are the sum of the base and extensions. */
5455
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -66,6 +67,7 @@ typedef uint32_t aarch64_insn;
6667
#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
6768
AARCH64_FEATURE_V8_2 \
6869
| AARCH64_FEATURE_F16 \
70+
| AARCH64_FEATURE_RAS \
6971
| AARCH64_FEATURE_FP \
7072
| AARCH64_FEATURE_SIMD \
7173
| AARCH64_FEATURE_CRC \

‎opcodes/ChangeLog‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,11 @@
1+
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
2+
3+
* aarch64-asm-2.c: Regenerate.
4+
* aarch64-dis-2.c: Regenerate.
5+
* aarch64-tbl.h (aarch64_feature_ras): New.
6+
(RAS): New.
7+
(aarch64_opcode_table): Add "esb".
8+
19
2015-12-09 H.J. Lu <hongjiu.lu@intel.com>
210

311
* i386-dis.c (MOD_0F01_REG_5): New.

‎opcodes/aarch64-asm-2.c‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -422,6 +422,7 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
422422
case 1004: /* movz */
423423
value = 1004; /* --> movz. */
424424
break;
425+
case 1017: /* esb */
425426
case 1016: /* sevl */
426427
case 1015: /* sev */
427428
case 1014: /* wfi */
@@ -431,12 +432,12 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
431432
case 1010: /* hint */
432433
value = 1010; /* --> hint. */
433434
break;
434-
case 1025: /* tlbi */
435-
case 1024: /* ic */
436-
case 1023: /* dc */
437-
case 1022: /* at */
438-
case 1021: /* sys */
439-
value = 1021; /* --> sys. */
435+
case 1026: /* tlbi */
436+
case 1025: /* ic */
437+
case 1024: /* dc */
438+
case 1023: /* at */
439+
case 1022: /* sys */
440+
value = 1022; /* --> sys. */
440441
break;
441442
default: return NULL;
442443
}

‎opcodes/aarch64-dis-2.c‎

Lines changed: 19 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -3319,7 +3319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
33193319
10987654321098765432109876543210
33203320
xxxxxxxxxxxxxxxxxxxxx1xx1x10x01x
33213321
sysl. */
3322-
return 1027;
3322+
return 1028;
33233323
}
33243324
}
33253325
}
@@ -3342,7 +3342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
33423342
10987654321098765432109876543210
33433343
xxxxxxxxxxxxxxxxxxxxxxxx0110x1xx
33443344
tbz. */
3345-
return 1029;
3345+
return 1030;
33463346
}
33473347
}
33483348
else
@@ -3361,7 +3361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
33613361
10987654321098765432109876543210
33623362
xxxxxxxxxxxxxxxxxxxxxxxx1110x1xx
33633363
tbnz. */
3364-
return 1030;
3364+
return 1031;
33653365
}
33663366
}
33673367
}
@@ -8857,15 +8857,15 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
88578857
case 794: value = 798; break; /* ldnp --> ldp. */
88588858
case 798: return NULL; /* ldp --> NULL. */
88598859
case 1009: value = 1010; break; /* msr --> hint. */
8860-
case 1010: value = 1017; break; /* hint --> clrex. */
8861-
case 1017: value = 1018; break; /* clrex --> dsb. */
8862-
case 1018: value = 1019; break; /* dsb --> dmb. */
8863-
case 1019: value = 1020; break; /* dmb --> isb. */
8864-
case 1020: value = 1021; break; /* isb --> sys. */
8865-
case 1021: value = 1026; break; /* sys --> msr. */
8866-
case 1026: return NULL; /* msr --> NULL. */
8867-
case 1027: value = 1028; break; /* sysl --> mrs. */
8868-
case 1028: return NULL; /* mrs --> NULL. */
8860+
case 1010: value = 1018; break; /* hint --> clrex. */
8861+
case 1018: value = 1019; break; /* clrex --> dsb. */
8862+
case 1019: value = 1020; break; /* dsb --> dmb. */
8863+
case 1020: value = 1021; break; /* dmb --> isb. */
8864+
case 1021: value = 1022; break; /* isb --> sys. */
8865+
case 1022: value = 1027; break; /* sys --> msr. */
8866+
case 1027: return NULL; /* msr --> NULL. */
8867+
case 1028: value = 1029; break; /* sysl --> mrs. */
8868+
case 1029: return NULL; /* mrs --> NULL. */
88698869
case 361: value = 362; break; /* st4 --> st1. */
88708870
case 362: value = 363; break; /* st1 --> st2. */
88718871
case 363: value = 364; break; /* st2 --> st3. */
@@ -9145,8 +9145,8 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode)
91459145
case 952: value = 1001; break; /* lduminl --> stuminl. */
91469146
case 1002: value = 1003; break; /* movn --> mov. */
91479147
case 1004: value = 1005; break; /* movz --> mov. */
9148-
case 1010: value = 1016; break; /* hint --> sevl. */
9149-
case 1021: value = 1025; break; /* sys --> tlbi. */
9148+
case 1010: value = 1017; break; /* hint --> esb. */
9149+
case 1022: value = 1026; break; /* sys --> tlbi. */
91509150
default: return NULL;
91519151
}
91529152

@@ -9271,16 +9271,17 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode)
92719271
case 1001: value = 952; break; /* stuminl --> lduminl. */
92729272
case 1003: value = 1002; break; /* mov --> movn. */
92739273
case 1005: value = 1004; break; /* mov --> movz. */
9274+
case 1017: value = 1016; break; /* esb --> sevl. */
92749275
case 1016: value = 1015; break; /* sevl --> sev. */
92759276
case 1015: value = 1014; break; /* sev --> wfi. */
92769277
case 1014: value = 1013; break; /* wfi --> wfe. */
92779278
case 1013: value = 1012; break; /* wfe --> yield. */
92789279
case 1012: value = 1011; break; /* yield --> nop. */
92799280
case 1011: value = 1010; break; /* nop --> hint. */
9280-
case 1025: value = 1024; break; /* tlbi --> ic. */
9281-
case 1024: value = 1023; break; /* ic --> dc. */
9282-
case 1023: value = 1022; break; /* dc --> at. */
9283-
case 1022: value = 1021; break; /* at --> sys. */
9281+
case 1026: value = 1025; break; /* tlbi --> ic. */
9282+
case 1025: value = 1024; break; /* ic --> dc. */
9283+
case 1024: value = 1023; break; /* dc --> at. */
9284+
case 1023: value = 1022; break; /* at --> sys. */
92849285
default: return NULL;
92859286
}
92869287

‎opcodes/aarch64-tbl.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1297,6 +1297,8 @@ static const aarch64_feature_set aarch64_feature_lor =
12971297
AARCH64_FEATURE (AARCH64_FEATURE_LOR, 0);
12981298
static const aarch64_feature_set aarch64_feature_rdma =
12991299
AARCH64_FEATURE (AARCH64_FEATURE_RDMA, 0);
1300+
static const aarch64_feature_set aarch64_feature_ras =
1301+
AARCH64_FEATURE (AARCH64_FEATURE_RAS, 0);
13001302
static const aarch64_feature_set aarch64_feature_v8_2 =
13011303
AARCH64_FEATURE (AARCH64_FEATURE_V8_2, 0);
13021304
static const aarch64_feature_set aarch64_feature_fp_f16 =
@@ -1311,6 +1313,7 @@ static const aarch64_feature_set aarch64_feature_fp_f16 =
13111313
#define LOR &aarch64_feature_lor
13121314
#define RDMA &aarch64_feature_rdma
13131315
#define FP_F16 &aarch64_feature_fp_f16
1316+
#define RAS &aarch64_feature_ras
13141317
#define ARMV8_2 &aarch64_feature_v8_2
13151318

13161319
struct aarch64_opcode aarch64_opcode_table[] =
@@ -2456,6 +2459,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
24562459
{"wfi", 0xd503207f, 0xffffffff, ic_system, 0, CORE, OP0 (), {}, F_ALIAS},
24572460
{"sev", 0xd503209f, 0xffffffff, ic_system, 0, CORE, OP0 (), {}, F_ALIAS},
24582461
{"sevl", 0xd50320bf, 0xffffffff, ic_system, 0, CORE, OP0 (), {}, F_ALIAS},
2462+
{"esb", 0xd503221f, 0xffffffff, ic_system, 0, RAS, OP0 (), {}, F_ALIAS},
24592463
{"clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, CORE, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)},
24602464
{"dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, CORE, OP1 (BARRIER), {}, 0},
24612465
{"dmb", 0xd50330bf, 0xfffff0ff, ic_system, 0, CORE, OP1 (BARRIER), {}, 0},

0 commit comments

Comments
 (0)