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2012-11-30 Oleg Raikhman <oleg@adapteva.com>
 Joern Rennecke <joern.rennecke@embecosm.com> cpu: * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. (testset-insn): Add NO_DIS attribute to t.l. (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. (move-insns): Add NO-DIS attribute to cmov.l. (op-mmr-movts): Add NO-DIS attribute to movts.l. (op-mmr-movfs): Add NO-DIS attribute to movfs.l. (op-rrr): Add NO-DIS attribute to .l. (shift-rrr): Add NO-DIS attribute to .l. (op-shift-rri): Add NO-DIS attribute to i32.l. (bitrl, movtl): Add NO-DIS attribute. (op-iextrrr): Add NO-DIS attribute to .l (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. opcodes: * epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
1 parent d248920 commit 02a79b8

6 files changed

Lines changed: 173 additions & 149 deletions

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‎cpu/ChangeLog‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,21 @@
1+
2012-11-30 Oleg Raikhman <oleg@adapteva.com>
2+
Joern Rennecke <joern.rennecke@embecosm.com>
3+
4+
* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
5+
(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
6+
(testset-insn): Add NO_DIS attribute to t.l.
7+
(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
8+
(move-insns): Add NO-DIS attribute to cmov.l.
9+
(op-mmr-movts): Add NO-DIS attribute to movts.l.
10+
(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
11+
(op-rrr): Add NO-DIS attribute to .l.
12+
(shift-rrr): Add NO-DIS attribute to .l.
13+
(op-shift-rri): Add NO-DIS attribute to i32.l.
14+
(bitrl, movtl): Add NO-DIS attribute.
15+
(op-iextrrr): Add NO-DIS attribute to .l
16+
(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
17+
(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
18+
119
2012-02-27 Alan Modra <amodra@gmail.com>
220

321
* mt.opc (print_dollarhex): Trim values to 32 bits.

‎cpu/epiphany.cpu‎

Lines changed: 29 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -352,7 +352,7 @@
352352
(prefix "")
353353
(values
354354
; some preferred aliases
355-
(sb 9) (sl 10) (fp 11) (ip 12) (sp 13) (lr 14)
355+
(fp 11) (sp 13) (lr 14)
356356
; the default register names
357357
(r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
358358
(r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
@@ -365,6 +365,7 @@
365365
; some less popular aliases
366366
(a1 0) (a2 1) (a3 2) (a4 3) (v1 4) (v2 5) (v3 6) (v4 7)
367367
(v5 8) (v6 9) (v7 10) (v8 11)
368+
(sb 9) (sl 10) (ip 12)
368369
)
369370
)
370371

@@ -1428,7 +1429,7 @@
14281429

14291430
(dnmi (.sym name "x")
14301431
(.str "load " mode " indexed")
1431-
()
1432+
(NO-DIS)
14321433
(.str name ".l $rd6,[$rn6,$direction$rm6]")
14331434
(emit (.sym name "x.l") rd6 rn6 direction rm6)
14341435
)
@@ -1453,7 +1454,7 @@
14531454

14541455
(dnmi (.sym name "p")
14551456
(.str "load " mode " postmodify")
1456-
()
1457+
(NO-DIS)
14571458
(.str name ".l $rd6,[$rn6],$direction$rm6")
14581459
(emit (.sym name "p.l") rd6 rn6 direction rm6)
14591460
)
@@ -1494,7 +1495,7 @@
14941495

14951496
(dnmi (.sym name "d")
14961497
(.str "load " mode " displacement")
1497-
()
1498+
(NO-DIS)
14981499
(.str name ".l $rd6,[$rn6,$dpmi$disp11]")
14991500
(emit (.sym name "d.l") rd6 rn6 dpmi disp11)
15001501
)
@@ -1519,7 +1520,7 @@
15191520

15201521
(dnmi (.sym name "dpm")
15211522
(.str "load " mode " displacement post-modify")
1522-
()
1523+
(NO-DIS)
15231524
(.str name ".l $rd6,[$rn6],$dpmi$disp11")
15241525
(emit (.sym name "dpm.l") rd6 rn6 dpmi disp11)
15251526
)
@@ -1532,12 +1533,12 @@
15321533
(emit (.sym name "d16.s") rd rn (disp3 0))
15331534
)
15341535
(dnmi (.sym name "dl0") "load with 0 disp"
1535-
()
1536+
(NO-DIS)
15361537
(.str name " $rd6,[$rn6]")
15371538
(emit (.sym name "d.l") rd6 rn6 (dpmi 0) (disp11 0))
15381539
)
15391540
(dnmi (.sym name "dl0.l") "load with 0 disp"
1540-
()
1541+
(NO-DIS)
15411542
(.str name ".l $rd6,[$rn6]")
15421543
(emit (.sym name "d.l") rd6 rn6 (dpmi 0) (disp11 0))
15431544
)
@@ -1594,7 +1595,7 @@
15941595

15951596
(dnmi (.sym name "t.l")
15961597
(.str "testset " mode ".l indexed")
1597-
()
1598+
(NO-DIS)
15981599
(.str name ".l $rd6,[$rn6,$direction$rm6]")
15991600
(emit (.sym name "t") rd6 rn6 direction rm6)
16001601
)
@@ -1640,7 +1641,7 @@
16401641

16411642
(dnmi (.sym name "x.l")
16421643
(.str "store" mode " indexed")
1643-
()
1644+
(NO-DIS)
16441645
(.str name ".l $rd6,[$rn6,$direction$rm6]")
16451646
(emit (.sym name "x") rd6 rn6 direction rm6)
16461647
)
@@ -1676,7 +1677,7 @@
16761677
)
16771678
(dnmi (.sym name "p.l")
16781679
(.str "store " mode " postmodify")
1679-
()
1680+
(NO-DIS)
16801681
(.str name ".l $rd6,[$rn6],$direction$rm6")
16811682
(emit (.sym name "p") rd6 rn6 direction rm6)
16821683
)
@@ -1714,7 +1715,7 @@
17141715

17151716
(dnmi (.sym name "d.l")
17161717
(.str "store " mode " displacement")
1717-
()
1718+
(NO-DIS)
17181719
(.str name ".l $rd6,[$rn6,$dpmi$disp11]")
17191720
(emit (.sym name "d") rd6 rn6 dpmi disp11)
17201721
)
@@ -1737,7 +1738,7 @@
17371738
)
17381739
(dnmi (.sym name "dpm.l")
17391740
(.str "store " mode " displacement post-modify")
1740-
()
1741+
(NO-DIS)
17411742
(.str name ".l $rd6,[$rn6],$dpmi$disp11")
17421743
(emit (.sym name "dpm") rd6 rn6 dpmi disp11)
17431744
)
@@ -1756,7 +1757,7 @@
17561757
)
17571758

17581759
(dnmi (.sym name "dl0.l") "store w 0 disp"
1759-
()
1760+
(NO-DIS)
17601761
(.str name ".l $rd6,[$rn6]")
17611762
(emit (.sym name "d") rd6 rn6 (dpmi 0) (disp11 0))
17621763
)
@@ -1798,7 +1799,7 @@
17981799
)
17991800
(dnmi (.sym "cmov.l" cond)
18001801
(.str "move register " cond)
1801-
()
1802+
(NO-DIS)
18021803
(.str "mov" name ".l $rd6,$rn6")
18031804
(emit (.sym "cmov" cond) rd6 rn6)
18041805
)
@@ -1859,7 +1860,7 @@
18591860

18601861
(dnmi (.sym "movts.l" name)
18611862
(.str "move to " name)
1862-
()
1863+
(NO-DIS)
18631864
(.str "movts.l $" sdreg ",$rd6")
18641865
(emit (.sym "movts" name) sdreg rd6)
18651866
)
@@ -1903,7 +1904,7 @@
19031904

19041905
(dnmi (.sym "movfs.l" name)
19051906
(.str "move from " name)
1906-
()
1907+
(NO-DIS)
19071908
(.str "movfs.l $rd6,$" snreg)
19081909
(emit (.sym "movfs" name) rd6 snreg)
19091910
)
@@ -2165,7 +2166,7 @@
21652166

21662167
(dnmi (.sym name ".l")
21672168
(.str name)
2168-
()
2169+
(NO-DIS)
21692170
(.str name ".l $rd6,$rn6,$rm6")
21702171
(emit (.sym name) rd6 rn6 rm6)
21712172
)
@@ -2307,7 +2308,7 @@
23072308

23082309
(dnmi (.sym name ".l")
23092310
(.str name)
2310-
()
2311+
(NO-DIS)
23112312
(.str name ".l $rd6,$rn6,$rm6")
23122313
(emit (.sym name) rd6 rn6 rm6)
23132314
)
@@ -2349,7 +2350,7 @@
23492350

23502351
(dnmi (.sym name "i32.l")
23512352
(.str name)
2352-
()
2353+
(NO-DIS)
23532354
(.str name ".l $rd6,$rn6,$shift")
23542355
(emit (.sym name "i32") rd6 rn6 shift)
23552356
)
@@ -2411,7 +2412,7 @@
24112412
()
24122413
)
24132414
(dnmi bitrl "bit reverse l"
2414-
()
2415+
(NO-DIS)
24152416
("bitr.l $rd6,$rn6")
24162417
(emit bitr rd6 rn6)
24172418
)
@@ -2441,7 +2442,7 @@
24412442

24422443
(dnmi (.sym name ".l")
24432444
(.str name)
2444-
()
2445+
(NO-DIS)
24452446
(.str name ".l $rd6,$rn6,$rm6")
24462447
(emit (.sym name) rd6 rn6 rm6)
24472448
)
@@ -2496,7 +2497,7 @@
24962497
)
24972498
(dnmi movtl
24982499
"movt imm16"
2499-
()
2500+
(NO-DIS)
25002501
"movt.l $rd6,$imm16"
25012502
(emit movt rd6 imm16)
25022503
)
@@ -2581,7 +2582,7 @@
25812582

25822583
(if (or (and invExcEnbit bisbit)
25832584
(or (and ovfExcEnbit bvsbit) (and unExcEnbit busbit)))
2584-
(sequence ()
2585+
(sequence ()
25852586
(set expcause0bit (const 1))
25862587
(set expcause1bit (const 1))
25872588
(call-exception #x4 #x2)))
@@ -2602,7 +2603,7 @@
26022603

26032604
(dnmi (.sym "f_" name "f32.l")
26042605
(.str "f_" name)
2605-
()
2606+
(NO-DIS)
26062607
(.str "f" name ".l $rd6,$rn6,$rm6")
26072608
(emit (.sym "f_" name "f32") rd6 rn6 rm6)
26082609
)
@@ -2686,7 +2687,7 @@
26862687

26872688
(dnmi (.sym "f_" name "f32.l")
26882689
(.str "f_" name)
2689-
()
2690+
(NO-DIS)
26902691
(.str "f" name ".l $rd6,$rn6")
26912692
(emit (.sym "f_" name "f32") rd6 rn6)
26922693
)
@@ -2746,7 +2747,7 @@
27462747

27472748
(dnmi (.sym "f_" name "f32.l")
27482749
(.str "f_" name)
2749-
()
2750+
(NO-DIS)
27502751
(.str "f" name ".l $rd6,$rn6")
27512752
(emit (.sym "f_" name "f32") rd6 rn6)
27522753
)
@@ -2830,7 +2831,7 @@
28302831

28312832
(dnmi (.sym "f_" name "f32.l")
28322833
(.str "f_" name)
2833-
()
2834+
(NO-DIS)
28342835
(.str "f" name ".l $rd6,$rn6")
28352836
(emit (.sym "f_" name "f32") rd6 rn6)
28362837
)
@@ -2919,7 +2920,7 @@
29192920

29202921
(dnmi (.sym "f_" name "f32.l")
29212922
(.str "f_" name)
2922-
()
2923+
(NO-DIS)
29232924
(.str "f" name ".l $frd6,$frn6")
29242925
(emit (.sym "f_" name "f32") frd6 frn6)
29252926
)

‎opcodes/ChangeLog‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,8 @@
1+
2012-11-30 Oleg Raikhman <oleg@adapteva.com>
2+
Joern Rennecke <joern.rennecke@embecosm.com>
3+
4+
* epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
5+
16
2012-11-29 Roland McGrath <mcgrathr@google.com>
27

38
* s390-mkopc.c (file_header): Add const.

‎opcodes/epiphany-desc.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -131,10 +131,7 @@ static const CGEN_MACH epiphany_cgen_mach_table[] = {
131131

132132
static CGEN_KEYWORD_ENTRY epiphany_cgen_opval_gr_names_entries[] =
133133
{
134-
{ "sb", 9, {0, {{{0, 0}}}}, 0, 0 },
135-
{ "sl", 10, {0, {{{0, 0}}}}, 0, 0 },
136134
{ "fp", 11, {0, {{{0, 0}}}}, 0, 0 },
137-
{ "ip", 12, {0, {{{0, 0}}}}, 0, 0 },
138135
{ "sp", 13, {0, {{{0, 0}}}}, 0, 0 },
139136
{ "lr", 14, {0, {{{0, 0}}}}, 0, 0 },
140137
{ "r0", 0, {0, {{{0, 0}}}}, 0, 0 },
@@ -212,7 +209,10 @@ static CGEN_KEYWORD_ENTRY epiphany_cgen_opval_gr_names_entries[] =
212209
{ "v5", 8, {0, {{{0, 0}}}}, 0, 0 },
213210
{ "v6", 9, {0, {{{0, 0}}}}, 0, 0 },
214211
{ "v7", 10, {0, {{{0, 0}}}}, 0, 0 },
215-
{ "v8", 11, {0, {{{0, 0}}}}, 0, 0 }
212+
{ "v8", 11, {0, {{{0, 0}}}}, 0, 0 },
213+
{ "sb", 9, {0, {{{0, 0}}}}, 0, 0 },
214+
{ "sl", 10, {0, {{{0, 0}}}}, 0, 0 },
215+
{ "ip", 12, {0, {{{0, 0}}}}, 0, 0 }
216216
};
217217

218218
CGEN_KEYWORD epiphany_cgen_opval_gr_names =

‎opcodes/epiphany-desc.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -124,27 +124,27 @@ typedef enum insn_dc_25_2 {
124124

125125
/* Enum declaration for . */
126126
typedef enum gr_names {
127-
H_REGISTERS_SB = 9, H_REGISTERS_SL = 10, H_REGISTERS_FP = 11, H_REGISTERS_IP = 12
128-
, H_REGISTERS_SP = 13, H_REGISTERS_LR = 14, H_REGISTERS_R0 = 0, H_REGISTERS_R1 = 1
129-
, H_REGISTERS_R2 = 2, H_REGISTERS_R3 = 3, H_REGISTERS_R4 = 4, H_REGISTERS_R5 = 5
130-
, H_REGISTERS_R6 = 6, H_REGISTERS_R7 = 7, H_REGISTERS_R8 = 8, H_REGISTERS_R9 = 9
131-
, H_REGISTERS_R10 = 10, H_REGISTERS_R11 = 11, H_REGISTERS_R12 = 12, H_REGISTERS_R13 = 13
132-
, H_REGISTERS_R14 = 14, H_REGISTERS_R15 = 15, H_REGISTERS_R16 = 16, H_REGISTERS_R17 = 17
133-
, H_REGISTERS_R18 = 18, H_REGISTERS_R19 = 19, H_REGISTERS_R20 = 20, H_REGISTERS_R21 = 21
134-
, H_REGISTERS_R22 = 22, H_REGISTERS_R23 = 23, H_REGISTERS_R24 = 24, H_REGISTERS_R25 = 25
135-
, H_REGISTERS_R26 = 26, H_REGISTERS_R27 = 27, H_REGISTERS_R28 = 28, H_REGISTERS_R29 = 29
136-
, H_REGISTERS_R30 = 30, H_REGISTERS_R31 = 31, H_REGISTERS_R32 = 32, H_REGISTERS_R33 = 33
137-
, H_REGISTERS_R34 = 34, H_REGISTERS_R35 = 35, H_REGISTERS_R36 = 36, H_REGISTERS_R37 = 37
138-
, H_REGISTERS_R38 = 38, H_REGISTERS_R39 = 39, H_REGISTERS_R40 = 40, H_REGISTERS_R41 = 41
139-
, H_REGISTERS_R42 = 42, H_REGISTERS_R43 = 43, H_REGISTERS_R44 = 44, H_REGISTERS_R45 = 45
140-
, H_REGISTERS_R46 = 46, H_REGISTERS_R47 = 47, H_REGISTERS_R48 = 48, H_REGISTERS_R49 = 49
141-
, H_REGISTERS_R50 = 50, H_REGISTERS_R51 = 51, H_REGISTERS_R52 = 52, H_REGISTERS_R53 = 53
142-
, H_REGISTERS_R54 = 54, H_REGISTERS_R55 = 55, H_REGISTERS_R56 = 56, H_REGISTERS_R57 = 57
143-
, H_REGISTERS_R58 = 58, H_REGISTERS_R59 = 59, H_REGISTERS_R60 = 60, H_REGISTERS_R61 = 61
144-
, H_REGISTERS_R62 = 62, H_REGISTERS_R63 = 63, H_REGISTERS_A1 = 0, H_REGISTERS_A2 = 1
145-
, H_REGISTERS_A3 = 2, H_REGISTERS_A4 = 3, H_REGISTERS_V1 = 4, H_REGISTERS_V2 = 5
146-
, H_REGISTERS_V3 = 6, H_REGISTERS_V4 = 7, H_REGISTERS_V5 = 8, H_REGISTERS_V6 = 9
147-
, H_REGISTERS_V7 = 10, H_REGISTERS_V8 = 11
127+
H_REGISTERS_FP = 11, H_REGISTERS_SP = 13, H_REGISTERS_LR = 14, H_REGISTERS_R0 = 0
128+
, H_REGISTERS_R1 = 1, H_REGISTERS_R2 = 2, H_REGISTERS_R3 = 3, H_REGISTERS_R4 = 4
129+
, H_REGISTERS_R5 = 5, H_REGISTERS_R6 = 6, H_REGISTERS_R7 = 7, H_REGISTERS_R8 = 8
130+
, H_REGISTERS_R9 = 9, H_REGISTERS_R10 = 10, H_REGISTERS_R11 = 11, H_REGISTERS_R12 = 12
131+
, H_REGISTERS_R13 = 13, H_REGISTERS_R14 = 14, H_REGISTERS_R15 = 15, H_REGISTERS_R16 = 16
132+
, H_REGISTERS_R17 = 17, H_REGISTERS_R18 = 18, H_REGISTERS_R19 = 19, H_REGISTERS_R20 = 20
133+
, H_REGISTERS_R21 = 21, H_REGISTERS_R22 = 22, H_REGISTERS_R23 = 23, H_REGISTERS_R24 = 24
134+
, H_REGISTERS_R25 = 25, H_REGISTERS_R26 = 26, H_REGISTERS_R27 = 27, H_REGISTERS_R28 = 28
135+
, H_REGISTERS_R29 = 29, H_REGISTERS_R30 = 30, H_REGISTERS_R31 = 31, H_REGISTERS_R32 = 32
136+
, H_REGISTERS_R33 = 33, H_REGISTERS_R34 = 34, H_REGISTERS_R35 = 35, H_REGISTERS_R36 = 36
137+
, H_REGISTERS_R37 = 37, H_REGISTERS_R38 = 38, H_REGISTERS_R39 = 39, H_REGISTERS_R40 = 40
138+
, H_REGISTERS_R41 = 41, H_REGISTERS_R42 = 42, H_REGISTERS_R43 = 43, H_REGISTERS_R44 = 44
139+
, H_REGISTERS_R45 = 45, H_REGISTERS_R46 = 46, H_REGISTERS_R47 = 47, H_REGISTERS_R48 = 48
140+
, H_REGISTERS_R49 = 49, H_REGISTERS_R50 = 50, H_REGISTERS_R51 = 51, H_REGISTERS_R52 = 52
141+
, H_REGISTERS_R53 = 53, H_REGISTERS_R54 = 54, H_REGISTERS_R55 = 55, H_REGISTERS_R56 = 56
142+
, H_REGISTERS_R57 = 57, H_REGISTERS_R58 = 58, H_REGISTERS_R59 = 59, H_REGISTERS_R60 = 60
143+
, H_REGISTERS_R61 = 61, H_REGISTERS_R62 = 62, H_REGISTERS_R63 = 63, H_REGISTERS_A1 = 0
144+
, H_REGISTERS_A2 = 1, H_REGISTERS_A3 = 2, H_REGISTERS_A4 = 3, H_REGISTERS_V1 = 4
145+
, H_REGISTERS_V2 = 5, H_REGISTERS_V3 = 6, H_REGISTERS_V4 = 7, H_REGISTERS_V5 = 8
146+
, H_REGISTERS_V6 = 9, H_REGISTERS_V7 = 10, H_REGISTERS_V8 = 11, H_REGISTERS_SB = 9
147+
, H_REGISTERS_SL = 10, H_REGISTERS_IP = 12
148148
} GR_NAMES;
149149

150150
/* Enum declaration for +/- index register. */

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