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10181 lines (7634 loc) · 165 KB
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/* Misc. support for CPU family or1k32bf.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996-2019 Free Software Foundation, Inc.
This file is part of the GNU simulators.
This file is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
#define WANT_CPU or1k32bf
#define WANT_CPU_OR1K32BF
#include "sim-main.h"
#include "cgen-ops.h"
/* Get the value of h-pc. */
USI
or1k32bf_h_pc_get (SIM_CPU *current_cpu)
{
return GET_H_PC ();
}
/* Set a value for h-pc. */
void
or1k32bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_PC (newval);
}
/* Get the value of h-fsr. */
SF
or1k32bf_h_fsr_get (SIM_CPU *current_cpu, UINT regno)
{
return GET_H_FSR (regno);
}
/* Set a value for h-fsr. */
void
or1k32bf_h_fsr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
{
SET_H_FSR (regno, newval);
}
/* Get the value of h-spr. */
USI
or1k32bf_h_spr_get (SIM_CPU *current_cpu, UINT regno)
{
return GET_H_SPR (regno);
}
/* Set a value for h-spr. */
void
or1k32bf_h_spr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
{
SET_H_SPR (regno, newval);
}
/* Get the value of h-gpr. */
USI
or1k32bf_h_gpr_get (SIM_CPU *current_cpu, UINT regno)
{
return GET_H_GPR (regno);
}
/* Set a value for h-gpr. */
void
or1k32bf_h_gpr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
{
SET_H_GPR (regno, newval);
}
/* Get the value of h-sys-vr. */
USI
or1k32bf_h_sys_vr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_VR ();
}
/* Set a value for h-sys-vr. */
void
or1k32bf_h_sys_vr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_VR (newval);
}
/* Get the value of h-sys-upr. */
USI
or1k32bf_h_sys_upr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_UPR ();
}
/* Set a value for h-sys-upr. */
void
or1k32bf_h_sys_upr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_UPR (newval);
}
/* Get the value of h-sys-cpucfgr. */
USI
or1k32bf_h_sys_cpucfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_CPUCFGR ();
}
/* Set a value for h-sys-cpucfgr. */
void
or1k32bf_h_sys_cpucfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_CPUCFGR (newval);
}
/* Get the value of h-sys-dmmucfgr. */
USI
or1k32bf_h_sys_dmmucfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_DMMUCFGR ();
}
/* Set a value for h-sys-dmmucfgr. */
void
or1k32bf_h_sys_dmmucfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_DMMUCFGR (newval);
}
/* Get the value of h-sys-immucfgr. */
USI
or1k32bf_h_sys_immucfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_IMMUCFGR ();
}
/* Set a value for h-sys-immucfgr. */
void
or1k32bf_h_sys_immucfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_IMMUCFGR (newval);
}
/* Get the value of h-sys-dccfgr. */
USI
or1k32bf_h_sys_dccfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_DCCFGR ();
}
/* Set a value for h-sys-dccfgr. */
void
or1k32bf_h_sys_dccfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_DCCFGR (newval);
}
/* Get the value of h-sys-iccfgr. */
USI
or1k32bf_h_sys_iccfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ICCFGR ();
}
/* Set a value for h-sys-iccfgr. */
void
or1k32bf_h_sys_iccfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ICCFGR (newval);
}
/* Get the value of h-sys-dcfgr. */
USI
or1k32bf_h_sys_dcfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_DCFGR ();
}
/* Set a value for h-sys-dcfgr. */
void
or1k32bf_h_sys_dcfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_DCFGR (newval);
}
/* Get the value of h-sys-pccfgr. */
USI
or1k32bf_h_sys_pccfgr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_PCCFGR ();
}
/* Set a value for h-sys-pccfgr. */
void
or1k32bf_h_sys_pccfgr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_PCCFGR (newval);
}
/* Get the value of h-sys-npc. */
USI
or1k32bf_h_sys_npc_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_NPC ();
}
/* Set a value for h-sys-npc. */
void
or1k32bf_h_sys_npc_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_NPC (newval);
}
/* Get the value of h-sys-sr. */
USI
or1k32bf_h_sys_sr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_SR ();
}
/* Set a value for h-sys-sr. */
void
or1k32bf_h_sys_sr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_SR (newval);
}
/* Get the value of h-sys-ppc. */
USI
or1k32bf_h_sys_ppc_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_PPC ();
}
/* Set a value for h-sys-ppc. */
void
or1k32bf_h_sys_ppc_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_PPC (newval);
}
/* Get the value of h-sys-fpcsr. */
USI
or1k32bf_h_sys_fpcsr_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_FPCSR ();
}
/* Set a value for h-sys-fpcsr. */
void
or1k32bf_h_sys_fpcsr_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_FPCSR (newval);
}
/* Get the value of h-sys-epcr0. */
USI
or1k32bf_h_sys_epcr0_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR0 ();
}
/* Set a value for h-sys-epcr0. */
void
or1k32bf_h_sys_epcr0_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR0 (newval);
}
/* Get the value of h-sys-epcr1. */
USI
or1k32bf_h_sys_epcr1_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR1 ();
}
/* Set a value for h-sys-epcr1. */
void
or1k32bf_h_sys_epcr1_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR1 (newval);
}
/* Get the value of h-sys-epcr2. */
USI
or1k32bf_h_sys_epcr2_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR2 ();
}
/* Set a value for h-sys-epcr2. */
void
or1k32bf_h_sys_epcr2_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR2 (newval);
}
/* Get the value of h-sys-epcr3. */
USI
or1k32bf_h_sys_epcr3_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR3 ();
}
/* Set a value for h-sys-epcr3. */
void
or1k32bf_h_sys_epcr3_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR3 (newval);
}
/* Get the value of h-sys-epcr4. */
USI
or1k32bf_h_sys_epcr4_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR4 ();
}
/* Set a value for h-sys-epcr4. */
void
or1k32bf_h_sys_epcr4_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR4 (newval);
}
/* Get the value of h-sys-epcr5. */
USI
or1k32bf_h_sys_epcr5_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR5 ();
}
/* Set a value for h-sys-epcr5. */
void
or1k32bf_h_sys_epcr5_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR5 (newval);
}
/* Get the value of h-sys-epcr6. */
USI
or1k32bf_h_sys_epcr6_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR6 ();
}
/* Set a value for h-sys-epcr6. */
void
or1k32bf_h_sys_epcr6_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR6 (newval);
}
/* Get the value of h-sys-epcr7. */
USI
or1k32bf_h_sys_epcr7_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR7 ();
}
/* Set a value for h-sys-epcr7. */
void
or1k32bf_h_sys_epcr7_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR7 (newval);
}
/* Get the value of h-sys-epcr8. */
USI
or1k32bf_h_sys_epcr8_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR8 ();
}
/* Set a value for h-sys-epcr8. */
void
or1k32bf_h_sys_epcr8_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR8 (newval);
}
/* Get the value of h-sys-epcr9. */
USI
or1k32bf_h_sys_epcr9_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR9 ();
}
/* Set a value for h-sys-epcr9. */
void
or1k32bf_h_sys_epcr9_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR9 (newval);
}
/* Get the value of h-sys-epcr10. */
USI
or1k32bf_h_sys_epcr10_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR10 ();
}
/* Set a value for h-sys-epcr10. */
void
or1k32bf_h_sys_epcr10_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR10 (newval);
}
/* Get the value of h-sys-epcr11. */
USI
or1k32bf_h_sys_epcr11_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR11 ();
}
/* Set a value for h-sys-epcr11. */
void
or1k32bf_h_sys_epcr11_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR11 (newval);
}
/* Get the value of h-sys-epcr12. */
USI
or1k32bf_h_sys_epcr12_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR12 ();
}
/* Set a value for h-sys-epcr12. */
void
or1k32bf_h_sys_epcr12_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR12 (newval);
}
/* Get the value of h-sys-epcr13. */
USI
or1k32bf_h_sys_epcr13_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR13 ();
}
/* Set a value for h-sys-epcr13. */
void
or1k32bf_h_sys_epcr13_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR13 (newval);
}
/* Get the value of h-sys-epcr14. */
USI
or1k32bf_h_sys_epcr14_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR14 ();
}
/* Set a value for h-sys-epcr14. */
void
or1k32bf_h_sys_epcr14_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR14 (newval);
}
/* Get the value of h-sys-epcr15. */
USI
or1k32bf_h_sys_epcr15_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EPCR15 ();
}
/* Set a value for h-sys-epcr15. */
void
or1k32bf_h_sys_epcr15_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EPCR15 (newval);
}
/* Get the value of h-sys-eear0. */
USI
or1k32bf_h_sys_eear0_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR0 ();
}
/* Set a value for h-sys-eear0. */
void
or1k32bf_h_sys_eear0_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR0 (newval);
}
/* Get the value of h-sys-eear1. */
USI
or1k32bf_h_sys_eear1_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR1 ();
}
/* Set a value for h-sys-eear1. */
void
or1k32bf_h_sys_eear1_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR1 (newval);
}
/* Get the value of h-sys-eear2. */
USI
or1k32bf_h_sys_eear2_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR2 ();
}
/* Set a value for h-sys-eear2. */
void
or1k32bf_h_sys_eear2_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR2 (newval);
}
/* Get the value of h-sys-eear3. */
USI
or1k32bf_h_sys_eear3_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR3 ();
}
/* Set a value for h-sys-eear3. */
void
or1k32bf_h_sys_eear3_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR3 (newval);
}
/* Get the value of h-sys-eear4. */
USI
or1k32bf_h_sys_eear4_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR4 ();
}
/* Set a value for h-sys-eear4. */
void
or1k32bf_h_sys_eear4_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR4 (newval);
}
/* Get the value of h-sys-eear5. */
USI
or1k32bf_h_sys_eear5_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR5 ();
}
/* Set a value for h-sys-eear5. */
void
or1k32bf_h_sys_eear5_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR5 (newval);
}
/* Get the value of h-sys-eear6. */
USI
or1k32bf_h_sys_eear6_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR6 ();
}
/* Set a value for h-sys-eear6. */
void
or1k32bf_h_sys_eear6_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR6 (newval);
}
/* Get the value of h-sys-eear7. */
USI
or1k32bf_h_sys_eear7_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR7 ();
}
/* Set a value for h-sys-eear7. */
void
or1k32bf_h_sys_eear7_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR7 (newval);
}
/* Get the value of h-sys-eear8. */
USI
or1k32bf_h_sys_eear8_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR8 ();
}
/* Set a value for h-sys-eear8. */
void
or1k32bf_h_sys_eear8_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR8 (newval);
}
/* Get the value of h-sys-eear9. */
USI
or1k32bf_h_sys_eear9_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR9 ();
}
/* Set a value for h-sys-eear9. */
void
or1k32bf_h_sys_eear9_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR9 (newval);
}
/* Get the value of h-sys-eear10. */
USI
or1k32bf_h_sys_eear10_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR10 ();
}
/* Set a value for h-sys-eear10. */
void
or1k32bf_h_sys_eear10_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR10 (newval);
}
/* Get the value of h-sys-eear11. */
USI
or1k32bf_h_sys_eear11_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR11 ();
}
/* Set a value for h-sys-eear11. */
void
or1k32bf_h_sys_eear11_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR11 (newval);
}
/* Get the value of h-sys-eear12. */
USI
or1k32bf_h_sys_eear12_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR12 ();
}
/* Set a value for h-sys-eear12. */
void
or1k32bf_h_sys_eear12_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR12 (newval);
}
/* Get the value of h-sys-eear13. */
USI
or1k32bf_h_sys_eear13_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR13 ();
}
/* Set a value for h-sys-eear13. */
void
or1k32bf_h_sys_eear13_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR13 (newval);
}
/* Get the value of h-sys-eear14. */
USI
or1k32bf_h_sys_eear14_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR14 ();
}
/* Set a value for h-sys-eear14. */
void
or1k32bf_h_sys_eear14_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR14 (newval);
}
/* Get the value of h-sys-eear15. */
USI
or1k32bf_h_sys_eear15_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_EEAR15 ();
}
/* Set a value for h-sys-eear15. */
void
or1k32bf_h_sys_eear15_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_EEAR15 (newval);
}
/* Get the value of h-sys-esr0. */
USI
or1k32bf_h_sys_esr0_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR0 ();
}
/* Set a value for h-sys-esr0. */
void
or1k32bf_h_sys_esr0_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR0 (newval);
}
/* Get the value of h-sys-esr1. */
USI
or1k32bf_h_sys_esr1_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR1 ();
}
/* Set a value for h-sys-esr1. */
void
or1k32bf_h_sys_esr1_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR1 (newval);
}
/* Get the value of h-sys-esr2. */
USI
or1k32bf_h_sys_esr2_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR2 ();
}
/* Set a value for h-sys-esr2. */
void
or1k32bf_h_sys_esr2_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR2 (newval);
}
/* Get the value of h-sys-esr3. */
USI
or1k32bf_h_sys_esr3_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR3 ();
}
/* Set a value for h-sys-esr3. */
void
or1k32bf_h_sys_esr3_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR3 (newval);
}
/* Get the value of h-sys-esr4. */
USI
or1k32bf_h_sys_esr4_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR4 ();
}
/* Set a value for h-sys-esr4. */
void
or1k32bf_h_sys_esr4_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR4 (newval);
}
/* Get the value of h-sys-esr5. */
USI
or1k32bf_h_sys_esr5_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR5 ();
}
/* Set a value for h-sys-esr5. */
void
or1k32bf_h_sys_esr5_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR5 (newval);
}
/* Get the value of h-sys-esr6. */
USI
or1k32bf_h_sys_esr6_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR6 ();
}
/* Set a value for h-sys-esr6. */
void
or1k32bf_h_sys_esr6_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR6 (newval);
}
/* Get the value of h-sys-esr7. */
USI
or1k32bf_h_sys_esr7_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR7 ();
}
/* Set a value for h-sys-esr7. */
void
or1k32bf_h_sys_esr7_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR7 (newval);
}
/* Get the value of h-sys-esr8. */
USI
or1k32bf_h_sys_esr8_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR8 ();
}
/* Set a value for h-sys-esr8. */
void
or1k32bf_h_sys_esr8_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR8 (newval);
}
/* Get the value of h-sys-esr9. */
USI
or1k32bf_h_sys_esr9_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR9 ();
}
/* Set a value for h-sys-esr9. */
void
or1k32bf_h_sys_esr9_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR9 (newval);
}
/* Get the value of h-sys-esr10. */
USI
or1k32bf_h_sys_esr10_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR10 ();
}
/* Set a value for h-sys-esr10. */
void
or1k32bf_h_sys_esr10_set (SIM_CPU *current_cpu, USI newval)
{
SET_H_SYS_ESR10 (newval);
}
/* Get the value of h-sys-esr11. */
USI
or1k32bf_h_sys_esr11_get (SIM_CPU *current_cpu)
{
return GET_H_SYS_ESR11 ();
}
/* Set a value for h-sys-esr11. */