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Magnus Dammpmundt
Magnus Damm
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pmundt
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ARM: mach-shmobile: sh7372 MSIOF clock support
Add clock control support for sh7372 MSIOF hardware blocks. No upstream sh7372 boards are making use of MSIOF0->2, but the sh7372 hardware happens to come out of reset with all MSIOF MSTP clocks _enabled_, so to save power we need to implement a fix in software to shut down unused clocks. This patch relies on the recently merged 794d78f drivers: sh: late disabling of clocks V2 to make sure the unused clocks get disabled as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Lines changed: 9 additions & 3 deletions

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‎arch/arm/mach-shmobile/clock-sh7372.c‎

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -503,14 +503,14 @@ static struct clk *late_main_clks[] = {
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&sh7372_fsidivb_clk,
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};
505505

506-
enum { MSTP001,
506+
enum { MSTP001, MSTP000,
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MSTP131, MSTP130,
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MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
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MSTP118, MSTP117, MSTP116, MSTP113,
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MSTP106, MSTP101, MSTP100,
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MSTP223,
512-
MSTP214, MSTP218, MSTP217, MSTP216,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
512+
MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
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MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
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MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
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MSTP403, MSTP400,
@@ -521,6 +521,7 @@ enum { MSTP001,
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static struct clk mstp_clks[MSTP_NR] = {
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[MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
524+
[MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
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[MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
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[MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
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[MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
@@ -540,8 +541,10 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
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[MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
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[MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
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[MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
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[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
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[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
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[MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
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[MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
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[MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
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[MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
@@ -612,6 +615,7 @@ static struct clk_lookup lookups[] = {
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/* MSTP32 clocks */
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CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
618+
CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
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CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
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CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
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CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
@@ -633,8 +637,10 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
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CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
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CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
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CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
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CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
643+
CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
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CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
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CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
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CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */

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