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2290 lines (2113 loc) Β· 89.8 KB
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/**
* @brief SWAR-accelerated Type Conversions for SIMD-free CPUs.
* @file include/numkong/cast/serial.h
* @author Ash Vardanian
* @date January 2, 2026
*/
#ifndef NK_CAST_SERIAL_H
#define NK_CAST_SERIAL_H
#include "numkong/types.h"
#if defined(__cplusplus)
extern "C" {
#endif
#pragma region - Type Punned Loads and Stores
/** @brief Type-agnostic 32-bit full load (scalar). */
NK_INTERNAL void nk_load_b32_serial_(void const *src, nk_b32_vec_t *dst) { dst->u32 = *(nk_u32_t const *)src; }
/** @brief Type-agnostic 32-bit full store (scalar). */
NK_INTERNAL void nk_store_b32_serial_(nk_b32_vec_t const *src, void *dst) { *(nk_u32_t *)dst = src->u32; }
/** @brief Type-agnostic 128-bit store (serial, word-by-word). */
NK_INTERNAL void nk_store_b128_serial_(nk_b128_vec_t const *src, void *dst) {
nk_u64_t *d = (nk_u64_t *)dst;
d[0] = src->u64s[0];
d[1] = src->u64s[1];
}
/** @brief Type-agnostic 256-bit store (serial, word-by-word). */
NK_INTERNAL void nk_store_b256_serial_(nk_b256_vec_t const *src, void *dst) {
nk_u64_t *d = (nk_u64_t *)dst;
d[0] = src->u64s[0];
d[1] = src->u64s[1];
d[2] = src->u64s[2];
d[3] = src->u64s[3];
}
#pragma endregion - Type Punned Loads and Stores
/**
* @brief Expands an `f16` (IEEE-754 16-bit) to a `float`.
*
* Handles all IEEE-754 edge cases:
*
* Input F16 Hex F32 Hex Description
* +0 0x0000 0x00000000 Positive zero
* -0 0x8000 0x80000000 Negative zero
* +inf 0x7C00 0x7F800000 Positive infinity
* -inf 0xFC00 0xFF800000 Negative infinity
* NaN 0x7E00 0x7FC00000 Quiet NaN (payload preserved)
* Min normal 0x0400 0x38800000 2β»ΒΉβ΄
* Max normal 0x7BFF 0x477FE000 65504
* Min denorm 0x0001 0x33800000 2β»Β²β΄
* Max denorm 0x03FF 0x387FC000 2β»ΒΉβ΄ - 2β»Β²β΄
*
* https://stackoverflow.com/a/60047308
* https://gist.github.com/milhidaka/95863906fe828198f47991c813dbe233
* https://github.com/OpenCyphal/libcanard/blob/636795f4bc395f56af8d2c61d3757b5e762bb9e5/canard.c#L811-L834
*/
NK_PUBLIC void nk_f16_to_f32_serial(nk_f16_t const *src, nk_f32_t *dest) {
#if NK_NATIVE_F16
*dest = (nk_f32_t)(*src);
#else
unsigned short x;
nk_copy_bytes_(&x, src, 2);
unsigned int sign = (x >> 15) & 1;
unsigned int exponent = (x >> 10) & 0x1F;
unsigned int mantissa = x & 0x03FF;
nk_fui32_t conv;
if (exponent == 0) {
if (mantissa == 0) {
// Zero (preserve sign)
conv.u = sign << 31;
}
else {
// Denormal: value = mantissa Γ 2β»Β²β΄
// Use FPU normalization, then subtract 24 from exponent
nk_fui32_t temp;
temp.f = (float)mantissa;
conv.u = (sign << 31) | (temp.u - 0x0C000000);
}
}
else if (exponent == 31) {
// Infinity (mantissa=0) or NaN (mantissa!=0)
conv.u = (sign << 31) | 0x7F800000 | (mantissa << 13);
}
else {
// Normal: rebias exponent (127-15=112), shift mantissa
conv.u = (sign << 31) | ((exponent + 112) << 23) | (mantissa << 13);
}
*dest = conv.f;
#endif
}
/** @brief Load 4 Γ f16 from memory and upcast them to 4 Γ f32. */
NK_INTERNAL void nk_load_f16x4_to_f32x4_serial_(void const *src, nk_b128_vec_t *dst) {
nk_f16_t const *scalars = (nk_f16_t const *)src;
nk_f16_to_f32_serial(scalars + 0, dst->f32s + 0);
nk_f16_to_f32_serial(scalars + 1, dst->f32s + 1);
nk_f16_to_f32_serial(scalars + 2, dst->f32s + 2);
nk_f16_to_f32_serial(scalars + 3, dst->f32s + 3);
}
/** @brief Partial load for up to 4 Γ f16 with upcast to 4 Γ f32. */
NK_INTERNAL void nk_partial_load_f16x4_to_f32x4_serial_(nk_f16_t const *src, nk_b128_vec_t *dst, nk_size_t n) {
dst->u64s[0] = 0, dst->u64s[1] = 0;
switch (n) {
default:
case 4: nk_f16_to_f32_serial(src + 3, dst->f32s + 3); // fallthrough
case 3: nk_f16_to_f32_serial(src + 2, dst->f32s + 2); // fallthrough
case 2: nk_f16_to_f32_serial(src + 1, dst->f32s + 1); // fallthrough
case 1: nk_f16_to_f32_serial(src + 0, dst->f32s + 0); // fallthrough
case 0: break;
}
}
/**
* @brief Compresses a `float` to an `f16` (IEEE-754 16-bit).
*
* Handles all IEEE-754 edge cases with round-to-nearest:
*
* Input F32 Hex F16 Hex Description
* +0 0x00000000 0x0000 Positive zero
* -0 0x80000000 0x8000 Negative zero
* +inf 0x7F800000 0x7C00 Positive infinity
* -inf 0xFF800000 0xFC00 Negative infinity
* NaN 0x7FC00000 0x7E00 Quiet NaN (payload truncated)
* 1.0 0x3F800000 0x3C00 Normal number
* 65504 0x477FE000 0x7BFF Max f16 normal
* 65520+ >0x477FE000 0x7C00 Overflow β infinity
* 2β»ΒΉβ΄ 0x38800000 0x0400 Min f16 normal
* 2β»Β²β΄ 0x33800000 0x0001 Min f16 denormal
* <2β»Β²β΅ <0x33000000 0x0000 Underflow β zero
*
* https://stackoverflow.com/a/60047308
* https://gist.github.com/milhidaka/95863906fe828198f47991c813dbe233
* https://github.com/OpenCyphal/libcanard/blob/636795f4bc395f56af8d2c61d3757b5e762bb9e5/canard.c#L811-L834
*/
NK_PUBLIC void nk_f32_to_f16_serial(nk_f32_t const *src, nk_f16_t *dest) {
#if NK_NATIVE_F16
*dest = (nk_f16_t)(*src);
#else
nk_fui32_t conv;
conv.f = *src;
unsigned int sign = (conv.u >> 31) & 1;
unsigned int exponent = (conv.u >> 23) & 0xFF;
unsigned int mantissa = conv.u & 0x007FFFFF;
unsigned short result;
if (exponent == 0) {
// Zero or f32 denormal β f16 zero
result = (unsigned short)(sign << 15);
}
else if (exponent == 255) {
// Infinity or NaN
unsigned short payload = (unsigned short)(mantissa >> 13);
if (mantissa != 0 && payload == 0) payload = 1; // Preserve NaN-ness
result = (unsigned short)((sign << 15) | 0x7C00 | payload);
}
else if (exponent <= 102) {
// Below or at f16 denormal threshold
// exp=102 with mant=0 is exactly 2^-25 (tie point, rounds to 0 per round-to-even)
// exp=102 with mant>0 is above tie point (rounds to smallest denormal 0x0001)
if (exponent == 102 && mantissa > 0) result = (unsigned short)((sign << 15) | 0x0001);
else result = (unsigned short)(sign << 15);
}
else if (exponent < 113) {
// F16 denormal range (exp 103-112) with IEEE 754 round-to-nearest-even
unsigned int shift = 113 - exponent;
unsigned int shift_amount = shift + 13;
unsigned long long full_mant = 0x00800000ULL | mantissa;
// Extract result before rounding
unsigned int mant = (unsigned int)(full_mant >> shift_amount);
// IEEE 754 round-to-nearest-even: round up if round_bit is set AND
// (sticky_bits are nonzero OR result is odd)
unsigned int round_bit = (full_mant >> (shift_amount - 1)) & 1;
unsigned long long sticky_bits = full_mant & ((1ULL << (shift_amount - 1)) - 1);
if (round_bit && (sticky_bits || (mant & 1))) mant++;
result = (unsigned short)((sign << 15) | mant);
}
else if (exponent < 143) {
// Normal f16 range with IEEE 754 round-to-nearest-even
unsigned int f16_exp = exponent - 112;
unsigned int f16_mant = mantissa >> 13;
// IEEE 754 rounding: check round bit (bit 12) and sticky bits (bits 0-11)
unsigned int round_bit = (mantissa >> 12) & 1;
unsigned int sticky_bits = mantissa & 0xFFF;
if (round_bit && (sticky_bits || (f16_mant & 1))) {
f16_mant++;
if (f16_mant > 0x3FF) f16_mant = 0, f16_exp++;
}
if (f16_exp > 30) result = (unsigned short)((sign << 15) | 0x7C00);
else result = (unsigned short)((sign << 15) | (f16_exp << 10) | f16_mant);
}
else {
// Overflow β infinity
result = (unsigned short)((sign << 15) | 0x7C00);
}
nk_copy_bytes_(dest, &result, 2);
#endif
}
/**
* @brief For compilers that don't natively support the `__bf16` type,
* upcasts contents into a more conventional `float`.
*
* https://stackoverflow.com/questions/55253233/convert-fp32-to-bfloat16-in-c/55254307#55254307
* https://cloud.google.com/blog/products/ai-machine-learning/bfloat16-the-secret-to-high-performance-on-cloud-tpus
*/
NK_PUBLIC void nk_bf16_to_f32_serial(nk_bf16_t const *src, nk_f32_t *dest) {
#if NK_NATIVE_BF16
*dest = (nk_f32_t)(*src);
#else
unsigned short x;
nk_copy_bytes_(&x, src, 2);
nk_fui32_t conv;
conv.u = x << 16; // Zero extends the mantissa
*dest = conv.f;
#endif
}
/**
* @brief Compresses a `float` to a `bf16` representation.
*
* https://stackoverflow.com/questions/55253233/convert-fp32-to-bfloat16-in-c/55254307#55254307
* https://cloud.google.com/blog/products/ai-machine-learning/bfloat16-the-secret-to-high-performance-on-cloud-tpus
*/
NK_PUBLIC void nk_f32_to_bf16_serial(nk_f32_t const *src, nk_bf16_t *dest) {
#if NK_NATIVE_BF16
*dest = (nk_bf16_t)(*src);
#else
nk_fui32_t conv;
conv.f = *src;
// IEEE 754 round-to-nearest-even: add (0x7FFF + LSB)
unsigned int lsb = (conv.u >> 16) & 1;
conv.u += 0x7FFF + lsb;
conv.u >>= 16;
// Use an intermediate variable to ensure correct behavior on big-endian systems.
// Copying directly from `&conv.u` would copy the wrong bytes on big-endian,
// since the lower 16 bits are at offset 2, not offset 0.
unsigned short result = (unsigned short)conv.u;
nk_copy_bytes_(dest, &result, 2);
#endif
}
/**
* @brief Convert FP8 E4M3 to IEEE 754 single-precision float.
*
* E4M3 (FP8) format: 1 sign bit, 4 exponent bits (bias=7), 3 mantissa bits.
* Range: [-448, +448], no β, only two NaN encodings (0x7F, 0xFF).
* Subnormal values: (-1)Λ’ Γ mantissa Γ 2β»βΉ = mantissa / 512.
*
* Special value mappings (E4M3 β F32):
* Input E4M3 Hex F32 Hex Description
* +0 0x00 0x00000000 Positive zero
* -0 0x80 0x80000000 Negative zero
* +NaN 0x7F 0x7FC00000 Quiet NaN (exp=15, mant!=0)
* -NaN 0xFF 0xFFC00000 Quiet NaN (signed)
* +448 (max) 0x7E 0x43E00000 Max normal = 448
* -448 0xFE 0xC3E00000 Min normal = -448
* 1.0 0x38 0x3F800000 Normal (exp=7, mant=0)
* Min denorm 0x01 0x3B000000 1/512 = 2β»βΉ
* Max denorm 0x07 0x3BE00000 7/512 = 7 Γ 2β»βΉ
*
* References:
* https://arxiv.org/pdf/2209.05433 (NVIDIA/Intel/Arm FP8 paper)
* https://www.opencompute.org/documents/ocp-8-bit-floating-point-specification-ofp8-revision-1-0-2023-12-01-pdf-1
* https://onnx.ai/onnx/technical/float8.html
*/
NK_PUBLIC void nk_e4m3_to_f32_serial(nk_e4m3_t const *src, nk_f32_t *dest) {
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)(raw & 0x80) << 24;
nk_u32_t exponent = (raw >> 3) & 0x0Fu;
nk_u32_t mantissa = raw & 0x07u;
nk_fui32_t conv;
if (exponent == 0) {
if (mantissa == 0) {
conv.u = sign;
*dest = conv.f;
return;
}
nk_f32_t value = (nk_f32_t)mantissa * (1.0f / 512.0f);
*dest = sign ? -value : value;
return;
}
// E4M3FN has no β. Only exp=15 && mant=7 is NaN.
// exp=15 && mant=0..6 are normal values (256, 288, 320, 352, 384, 416, 448).
if (exponent == 0x0Fu && mantissa == 7) {
conv.u = sign | 0x7FC00000u; // F32 quiet NaN
*dest = conv.f;
return;
}
nk_u32_t f32_exponent = (exponent + 120u) << 23;
nk_u32_t f32_mantissa = mantissa << 20;
conv.u = sign | f32_exponent | f32_mantissa;
*dest = conv.f;
}
/**
* @brief Convert IEEE 754 single-precision float to FP8 E4M3.
*
* E4M3 (FP8) format: 1 sign bit, 4 exponent bits (bias=7), 3 mantissa bits.
* Range: [-448, +448], no β, only two NaN encodings.
* Rounding: RNE (Round to Nearest Even) per IEEE 754 / OCP FP8 spec.
* Subnormal threshold: values with |x| < 2β»βΆ use subnormal encoding.
*
* Special value mappings (F32 β E4M3):
* Input F32 Hex E4M3 Hex Description
* +0 0x00000000 0x00 Positive zero
* -0 0x80000000 0x80 Negative zero
* +inf 0x7F800000 0x7E Saturates to max (+448)
* -inf 0xFF800000 0xFE Saturates to min (-448)
* NaN 0x7FC00000 0x7F Quiet NaN
* 1.0 0x3F800000 0x38 Normal (exp=7, mant=0)
* 448+ >0x43E00000 0x7E Overflow β max
* 2β»βΆ 0x3E800000 0x08 Min normal
* <2β»ΒΉΒ² Γ β΅ <0x39800000 0x00 Underflow β zero (RNE boundary)
*
* References:
* https://arxiv.org/pdf/2209.05433 (NVIDIA/Intel/Arm FP8 paper)
* https://www.opencompute.org/documents/ocp-8-bit-floating-point-specification-ofp8-revision-1-0-2023-12-01-pdf-1
* https://onnx.ai/onnx/technical/float8.html
*/
NK_PUBLIC void nk_f32_to_e4m3_serial(nk_f32_t const *src, nk_e4m3_t *dest) {
nk_f32_t x = *src;
nk_fui32_t conv;
conv.f = x;
nk_u32_t sign_bit = conv.u >> 31;
nk_u32_t abs_bits = conv.u & 0x7FFFFFFFu;
nk_u8_t sign = (nk_u8_t)(sign_bit << 7);
// NaN β E4M3FN NaN (0x7F or 0xFF)
if (abs_bits > 0x7F800000u) {
*dest = (nk_e4m3_t)(sign | 0x7Fu);
return;
}
// Infinity β saturate to max (0x7E or 0xFE), E4M3FN has no β
if (abs_bits == 0x7F800000u) {
*dest = (nk_e4m3_t)(sign | 0x7Eu);
return;
}
if (abs_bits == 0) {
*dest = (nk_e4m3_t)sign;
return;
}
nk_f32_t abs_x = sign_bit ? -x : x;
// Subnormal range: [0, 1/64). Use RNE rounding via scaled * 512.
// The RNE boundary between 0 and 1/512 is at 0.5/512, not 1/512.
if (abs_x < (1.0f / 64.0f)) {
nk_f32_t scaled = abs_x * 512.0f;
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 8, promote to first normal (exp_field=1, mantissa=0)
if (mant > 7) {
*dest = (nk_e4m3_t)(sign | 0x08u);
return;
}
if (mant == 0) { *dest = (nk_e4m3_t)sign; }
else { *dest = (nk_e4m3_t)(sign | (nk_u8_t)mant); }
return;
}
nk_i32_t exp = (nk_i32_t)((abs_bits >> 23) & 0xFFu) - 127;
nk_u32_t mantissa = abs_bits & 0x7FFFFFu;
nk_u32_t significand = (1u << 23) | mantissa;
nk_i32_t shift = 23 - 3;
nk_u32_t remainder_mask = (1u << shift) - 1;
nk_u32_t remainder = significand & remainder_mask;
nk_u32_t halfway = 1u << (shift - 1);
nk_u32_t significand_rounded = significand >> shift;
if (remainder > halfway || (remainder == halfway && (significand_rounded & 1))) { ++significand_rounded; }
if (significand_rounded == (1u << (3 + 1))) {
significand_rounded >>= 1;
++exp;
}
if (exp > 8) {
// Saturate to max value 448 = 0x7E (exp=15, mantissa=6). Note: 0x7F is NaN in e4m3FN.
*dest = (nk_e4m3_t)(sign | 0x7Eu);
return;
}
if (exp < -6) {
nk_f32_t scaled = abs_x * 512.0f;
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 8, promote to first normal (exp_field=1, mantissa=0)
if (mant > 7) {
*dest = (nk_e4m3_t)(sign | 0x08u);
return;
}
if (mant == 0) { *dest = (nk_e4m3_t)sign; }
else { *dest = (nk_e4m3_t)(sign | (nk_u8_t)mant); }
return;
}
nk_u8_t exp_field = (nk_u8_t)(exp + 7);
nk_u8_t mant_field = (nk_u8_t)(significand_rounded & 0x07u);
// For exp_field=15, clamp mantissa to 6 to avoid NaN encoding (0x7F in e4m3FN)
if (exp_field == 15 && mant_field > 6) { mant_field = 6; }
*dest = (nk_e4m3_t)(sign | (exp_field << 3) | mant_field);
}
/**
* @brief Convert FP8 E4M3 to IEEE 754 half-precision float.
*
* E4M3 format: 1 sign bit, 4 exponent bits (bias=7), 3 mantissa bits.
* F16 format: 1 sign bit, 5 exponent bits (bias=15), 10 mantissa bits.
*
* Conversion notes:
* - Normal values: F16_exp = E4M3_exp + 8, mantissa shifted left by 7 bits
* - Subnormals: mant Γ 2β»βΉ (where 2β»βΉ = 0x1800 in F16)
* - NaN (0x7F): maps to F16 quiet NaN (0x7E00)
*/
NK_INTERNAL void nk_e4m3_to_f16_serial(nk_e4m3_t const *src, nk_f16_t *dest) {
nk_u8_t raw = *src;
nk_u16_t sign = ((nk_u16_t)(raw & 0x80)) << 8;
nk_u16_t mag = raw & 0x7F;
nk_u16_t mant = raw & 0x07;
nk_u16_t exp = (raw >> 3) & 0x0F;
nk_fui16_t result;
if (mag == 0x7F) {
result.u = sign | 0x7E00; // NaN
}
else if (exp == 0) {
// Subnormal: mant Γ 2β»βΉ, where 2β»βΉ = 0x1800 in F16
nk_fui16_t scale;
scale.u = 0x1800;
nk_fui16_t mant_f16;
mant_f16.f = (nk_f16_t)mant;
result.f = mant_f16.f * scale.f;
result.u |= sign;
}
else {
// Normal: F16 = sign | ((mag << 7) + 0x2000)
result.u = sign | ((mag << 7) + 0x2000);
}
*dest = result.f;
}
/**
* @brief Convert FP8 E5M2 to IEEE 754 single-precision float.
*
* E5M2 (FP8) format: 1 sign bit, 5 exponent bits (bias=15), 2 mantissa bits.
* Range: [-57344, +57344], supports infinity and NaN (IEEE 754 compatible).
* Subnormal values: (-1)Λ’ Γ mantissa Γ 2β»ΒΉβΆ = mantissa / 65536.
*
* Special value mappings (E5M2 β F32):
* Input E5M2 Hex F32 Hex Description
* +0 0x00 0x00000000 Positive zero
* -0 0x80 0x80000000 Negative zero
* +inf 0x7C 0x7F800000 Positive infinity
* -inf 0xFC 0xFF800000 Negative infinity
* +NaN 0x7D-7F 0x7FC00000 Quiet NaN (exp=31, mant!=0)
* -NaN 0xFD-FF 0xFFC00000 Quiet NaN (signed)
* +57344 (max) 0x7B 0x47600000 Max normal
* 1.0 0x3C 0x3F800000 Normal (exp=15, mant=0)
* Min denorm 0x01 0x37800000 1/65536 = 2β»ΒΉβΆ
* Max denorm 0x03 0x38000000 3/65536 = 3 Γ 2β»ΒΉβΆ
*
* References:
* https://arxiv.org/pdf/2209.05433 (NVIDIA/Intel/Arm FP8 paper)
* https://www.opencompute.org/documents/ocp-8-bit-floating-point-specification-ofp8-revision-1-0-2023-12-01-pdf-1
* https://onnx.ai/onnx/technical/float8.html
*/
NK_INTERNAL void nk_e5m2_to_f32_manual_(nk_e5m2_t const *src, nk_f32_t *dest) {
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)(raw & 0x80) << 24;
nk_u32_t exponent = (raw >> 2) & 0x1Fu;
nk_u32_t mantissa = raw & 0x03u;
nk_fui32_t conv;
if (exponent == 0) {
if (mantissa == 0) {
conv.u = sign;
*dest = conv.f;
return;
}
nk_f32_t value = (nk_f32_t)mantissa * (1.0f / 65536.0f);
*dest = sign ? -value : value;
return;
}
if (exponent == 0x1Fu) {
if (mantissa == 0) { conv.u = sign | 0x7F800000u; }
else { conv.u = sign | 0x7FC00000u; }
*dest = conv.f;
return;
}
nk_u32_t f32_exponent = (exponent + 112u) << 23;
nk_u32_t f32_mantissa = mantissa << 21;
conv.u = sign | f32_exponent | f32_mantissa;
*dest = conv.f;
}
NK_PUBLIC void nk_e5m2_to_f32_serial(nk_e5m2_t const *src, nk_f32_t *dest) {
static nk_u32_t const lut[128] = {
0x00000000, 0x37800000, 0x38000000, 0x38400000, // exp=0 sub
0x38800000, 0x38A00000, 0x38C00000, 0x38E00000, // exp=1
0x39000000, 0x39200000, 0x39400000, 0x39600000, // exp=2
0x39800000, 0x39A00000, 0x39C00000, 0x39E00000, // exp=3
0x3A000000, 0x3A200000, 0x3A400000, 0x3A600000, // exp=4
0x3A800000, 0x3AA00000, 0x3AC00000, 0x3AE00000, // exp=5
0x3B000000, 0x3B200000, 0x3B400000, 0x3B600000, // exp=6
0x3B800000, 0x3BA00000, 0x3BC00000, 0x3BE00000, // exp=7
0x3C000000, 0x3C200000, 0x3C400000, 0x3C600000, // exp=8
0x3C800000, 0x3CA00000, 0x3CC00000, 0x3CE00000, // exp=9
0x3D000000, 0x3D200000, 0x3D400000, 0x3D600000, // exp=10
0x3D800000, 0x3DA00000, 0x3DC00000, 0x3DE00000, // exp=11
0x3E000000, 0x3E200000, 0x3E400000, 0x3E600000, // exp=12
0x3E800000, 0x3EA00000, 0x3EC00000, 0x3EE00000, // exp=13
0x3F000000, 0x3F200000, 0x3F400000, 0x3F600000, // exp=14
0x3F800000, 0x3FA00000, 0x3FC00000, 0x3FE00000, // exp=15
0x40000000, 0x40200000, 0x40400000, 0x40600000, // exp=16
0x40800000, 0x40A00000, 0x40C00000, 0x40E00000, // exp=17
0x41000000, 0x41200000, 0x41400000, 0x41600000, // exp=18
0x41800000, 0x41A00000, 0x41C00000, 0x41E00000, // exp=19
0x42000000, 0x42200000, 0x42400000, 0x42600000, // exp=20
0x42800000, 0x42A00000, 0x42C00000, 0x42E00000, // exp=21
0x43000000, 0x43200000, 0x43400000, 0x43600000, // exp=22
0x43800000, 0x43A00000, 0x43C00000, 0x43E00000, // exp=23
0x44000000, 0x44200000, 0x44400000, 0x44600000, // exp=24
0x44800000, 0x44A00000, 0x44C00000, 0x44E00000, // exp=25
0x45000000, 0x45200000, 0x45400000, 0x45600000, // exp=26
0x45800000, 0x45A00000, 0x45C00000, 0x45E00000, // exp=27
0x46000000, 0x46200000, 0x46400000, 0x46600000, // exp=28
0x46800000, 0x46A00000, 0x46C00000, 0x46E00000, // exp=29
0x47000000, 0x47200000, 0x47400000, 0x47600000, // exp=30
0x7F800000, 0x7FC00000, 0x7FC00000, 0x7FC00000, // inf, nan
};
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)(raw & 0x80) << 24;
nk_fui32_t conv;
conv.u = sign | lut[raw & 0x7F];
*dest = conv.f;
}
/**
* @brief Convert IEEE 754 single-precision float to FP8 E5M2.
*
* E5M2 (FP8) format: 1 sign bit, 5 exponent bits (bias=15), 2 mantissa bits.
* Range: [-57344, +57344], supports infinity and NaN (IEEE 754 compatible).
* Rounding: RNE (Round to Nearest Even) per IEEE 754 / OCP FP8 spec.
* Subnormal threshold: values with |x| < 2β»ΒΉβ΄ use subnormal encoding.
*
* Special value mappings (F32 β E5M2):
* Input F32 Hex E5M2 Hex Description
* +0 0x00000000 0x00 Positive zero
* -0 0x80000000 0x80 Negative zero
* +inf 0x7F800000 0x7C Positive infinity
* -inf 0xFF800000 0xFC Negative infinity
* NaN 0x7FC00000 0x7D Quiet NaN
* 1.0 0x3F800000 0x3C Normal (exp=15, mant=0)
* 57344+ >0x47600000 0x7C Overflow β infinity
* 2β»ΒΉβ΄ 0x38800000 0x04 Min normal
* <2β»ΒΉβ· Γ β΅ <0x36800000 0x00 Underflow β zero (RNE boundary)
*
* References:
* https://arxiv.org/pdf/2209.05433 (NVIDIA/Intel/Arm FP8 paper)
* https://www.opencompute.org/documents/ocp-8-bit-floating-point-specification-ofp8-revision-1-0-2023-12-01-pdf-1
* https://onnx.ai/onnx/technical/float8.html
*/
NK_PUBLIC void nk_f32_to_e5m2_serial(nk_f32_t const *src, nk_e5m2_t *dest) {
nk_f32_t x = *src;
nk_fui32_t conv;
conv.f = x;
nk_u32_t sign_bit = conv.u >> 31;
nk_u32_t abs_bits = conv.u & 0x7FFFFFFFu;
nk_u8_t sign = (nk_u8_t)(sign_bit << 7);
if (abs_bits >= 0x7F800000u) {
nk_u8_t mant = (abs_bits > 0x7F800000u) ? 0x01u : 0x00u;
*dest = (nk_e5m2_t)(sign | 0x7Cu | mant);
return;
}
if (abs_bits == 0) {
*dest = (nk_e5m2_t)sign;
return;
}
nk_f32_t abs_x = sign_bit ? -x : x;
// Subnormal range: [0, 1/16384). Use RNE rounding via scaled * 65536.
// The RNE boundary between 0 and 1/65536 is at 0.5/65536, not 1/65536.
if (abs_x < (1.0f / 16384.0f)) {
nk_f32_t scaled = abs_x * 65536.0f;
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 4, promote to first normal (exp_field=1, mantissa=0)
if (mant > 3) {
*dest = (nk_e5m2_t)(sign | 0x04u);
return;
}
if (mant == 0) { *dest = (nk_e5m2_t)sign; }
else { *dest = (nk_e5m2_t)(sign | (nk_u8_t)mant); }
return;
}
nk_i32_t exp = (nk_i32_t)((abs_bits >> 23) & 0xFFu) - 127;
nk_u32_t mantissa = abs_bits & 0x7FFFFFu;
nk_u32_t significand = (1u << 23) | mantissa;
nk_i32_t shift = 23 - 2;
nk_u32_t remainder_mask = (1u << shift) - 1;
nk_u32_t remainder = significand & remainder_mask;
nk_u32_t halfway = 1u << (shift - 1);
nk_u32_t significand_rounded = significand >> shift;
if (remainder > halfway || (remainder == halfway && (significand_rounded & 1))) { ++significand_rounded; }
if (significand_rounded == (1u << (2 + 1))) {
significand_rounded >>= 1;
++exp;
}
if (exp > 15) {
*dest = (nk_e5m2_t)(sign | 0x7Cu);
return;
}
if (exp < -14) {
nk_f32_t scaled = abs_x * 65536.0f;
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 4, promote to first normal (exp_field=1, mantissa=0)
if (mant > 3) {
*dest = (nk_e5m2_t)(sign | 0x04u);
return;
}
if (mant == 0) { *dest = (nk_e5m2_t)sign; }
else { *dest = (nk_e5m2_t)(sign | (nk_u8_t)mant); }
return;
}
nk_u8_t exp_field = (nk_u8_t)(exp + 15);
nk_u8_t mant_field = (nk_u8_t)(significand_rounded & 0x03u);
*dest = (nk_e5m2_t)(sign | (exp_field << 2) | mant_field);
}
/**
* @brief Convert FP8 E5M2 to IEEE 754 half-precision float.
*
* E5M2 format: 1 sign bit, 5 exponent bits (bias=15), 2 mantissa bits.
* F16 format: 1 sign bit, 5 exponent bits (bias=15), 10 mantissa bits.
*
* Since E5M2 and F16 share the same exponent bias (15), normal values
* convert by simply shifting the magnitude left by 8 bits.
*
* Conversion notes:
* - Normal values: F16 = sign | (mag << 8)
* - Subnormals: mant Γ 2β»ΒΉβΆ (where 2β»ΒΉβΆ = 0x0100 in F16)
* - Infinity (0x7C): maps to F16 infinity (0x7C00)
* - NaN (0x7D-0x7F): maps to F16 quiet NaN (0x7E00)
*/
NK_INTERNAL void nk_e5m2_to_f16_manual_(nk_e5m2_t const *src, nk_f16_t *dest) {
nk_u8_t raw = *src;
nk_u16_t sign = ((nk_u16_t)(raw & 0x80)) << 8;
nk_u16_t mag = raw & 0x7F;
nk_u16_t mant = raw & 0x03;
nk_u16_t exp = (raw >> 2) & 0x1F;
nk_fui16_t result;
if (exp == 0) {
if (mant == 0) {
result.u = sign; // Zero
}
else {
// Subnormal: mant Γ 2β»ΒΉβΆ, where 2β»ΒΉβΆ = 0x0100 in F16
nk_fui16_t scale;
scale.u = 0x0100;
nk_fui16_t mant_f16;
mant_f16.f = (nk_f16_t)mant;
result.f = mant_f16.f * scale.f;
result.u |= sign;
}
}
else if (mag == 0x7C) {
result.u = sign | 0x7C00; // Infinity
}
else if (mag > 0x7C) {
result.u = sign | 0x7E00; // NaN
}
else {
// Normal: E5M2 and F16 have same bias (15), just shift magnitude
result.u = sign | ((nk_u16_t)mag << 8);
}
*dest = result.f;
}
NK_INTERNAL void nk_e5m2_to_f16_serial(nk_e5m2_t const *src, nk_f16_t *dest) {
static nk_u16_t const lut[128] = {
0x0000, 0x0100, 0x0200, 0x0300, // exp=0 sub
0x0400, 0x0500, 0x0600, 0x0700, // exp=1
0x0800, 0x0900, 0x0A00, 0x0B00, // exp=2
0x0C00, 0x0D00, 0x0E00, 0x0F00, // exp=3
0x1000, 0x1100, 0x1200, 0x1300, // exp=4
0x1400, 0x1500, 0x1600, 0x1700, // exp=5
0x1800, 0x1900, 0x1A00, 0x1B00, // exp=6
0x1C00, 0x1D00, 0x1E00, 0x1F00, // exp=7
0x2000, 0x2100, 0x2200, 0x2300, // exp=8
0x2400, 0x2500, 0x2600, 0x2700, // exp=9
0x2800, 0x2900, 0x2A00, 0x2B00, // exp=10
0x2C00, 0x2D00, 0x2E00, 0x2F00, // exp=11
0x3000, 0x3100, 0x3200, 0x3300, // exp=12
0x3400, 0x3500, 0x3600, 0x3700, // exp=13
0x3800, 0x3900, 0x3A00, 0x3B00, // exp=14
0x3C00, 0x3D00, 0x3E00, 0x3F00, // exp=15
0x4000, 0x4100, 0x4200, 0x4300, // exp=16
0x4400, 0x4500, 0x4600, 0x4700, // exp=17
0x4800, 0x4900, 0x4A00, 0x4B00, // exp=18
0x4C00, 0x4D00, 0x4E00, 0x4F00, // exp=19
0x5000, 0x5100, 0x5200, 0x5300, // exp=20
0x5400, 0x5500, 0x5600, 0x5700, // exp=21
0x5800, 0x5900, 0x5A00, 0x5B00, // exp=22
0x5C00, 0x5D00, 0x5E00, 0x5F00, // exp=23
0x6000, 0x6100, 0x6200, 0x6300, // exp=24
0x6400, 0x6500, 0x6600, 0x6700, // exp=25
0x6800, 0x6900, 0x6A00, 0x6B00, // exp=26
0x6C00, 0x6D00, 0x6E00, 0x6F00, // exp=27
0x7000, 0x7100, 0x7200, 0x7300, // exp=28
0x7400, 0x7500, 0x7600, 0x7700, // exp=29
0x7800, 0x7900, 0x7A00, 0x7B00, // exp=30
0x7C00, 0x7E00, 0x7E00, 0x7E00, // inf, nan
};
nk_u8_t raw = *src;
nk_u16_t sign = ((nk_u16_t)(raw & 0x80)) << 8;
nk_fui16_t result;
result.u = sign | lut[raw & 0x7F];
*dest = result.f;
}
/**
* @brief Convert FP6 E2M3FN to IEEE 754 single-precision float.
*
* E2M3FN (FP6) format: 1 sign bit, 2 exponent bits (bias=1), 3 mantissa bits.
* Range: [-7.5, +7.5], no infinity or NaN (OCP Microscaling FN format).
* Uses precomputed lookup table for all 64 possible values.
*
* References:
* https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf
* https://arxiv.org/abs/2401.14112 (FP6-LLM)
*/
NK_INTERNAL void nk_e2m3_to_f32_manual_(nk_e2m3_t const *src, nk_f32_t *dest) {
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)((raw >> 5) & 0x01u) << 31;
nk_u32_t exponent = (raw >> 3) & 0x03u;
nk_u32_t mantissa = raw & 0x07u;
nk_fui32_t conv;
// Handle zero
if (exponent == 0 && mantissa == 0) {
conv.u = sign;
*dest = conv.f;
return;
}
// Handle subnormal (exp=0, mant!=0)
if (exponent == 0) {
// Subnormal: value = 2^(1-bias) * (mantissa / 2^p) = 2^0 * (mantissa / 8) = mantissa / 8
nk_f32_t value = (nk_f32_t)mantissa * (1.0f / 8.0f);
*dest = sign ? -value : value;
return;
}
// Normal values: rebias from E2M3 (bias=1) to F32 (bias=127)
// E2M3 exp range: 1-3 (unbiased: 0-2)
// F32 needs: (e2m3_exp - 1) + 127 = e2m3_exp + 126
nk_u32_t f32_exponent = (exponent + 126u) << 23;
nk_u32_t f32_mantissa = mantissa << 20;
conv.u = sign | f32_exponent | f32_mantissa;
*dest = conv.f;
}
NK_PUBLIC void nk_e2m3_to_f32_serial(nk_e2m3_t const *src, nk_f32_t *dest) {
static nk_u32_t const lut[32] = {
0x00000000, 0x3E000000, 0x3E800000, 0x3EC00000, 0x3F000000, 0x3F200000, 0x3F400000, 0x3F600000, // exp=0 sub
0x3F800000, 0x3F900000, 0x3FA00000, 0x3FB00000, 0x3FC00000, 0x3FD00000, 0x3FE00000, 0x3FF00000, // exp=1
0x40000000, 0x40100000, 0x40200000, 0x40300000, 0x40400000, 0x40500000, 0x40600000, 0x40700000, // exp=2
0x40800000, 0x40900000, 0x40A00000, 0x40B00000, 0x40C00000, 0x40D00000, 0x40E00000, 0x40F00000, // exp=3
};
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)((raw >> 5) & 0x01u) << 31;
nk_fui32_t conv;
conv.u = sign | lut[raw & 0x1F];
*dest = conv.f;
}
/**
* @brief Convert IEEE 754 single-precision float to FP6 E2M3FN.
*
* E2M3FN (FP6) format: 1 sign bit, 2 exponent bits (bias=1), 3 mantissa bits.
* Range: [-7.5, +7.5], no β or NaN. Saturates to max on overflow.
* Rounding: RNE (Round to Nearest Even) per IEEE 754.
* Subnormal threshold: values with |x| < 0.5 use subnormal encoding.
*/
NK_PUBLIC void nk_f32_to_e2m3_serial(nk_f32_t const *src, nk_e2m3_t *dest) {
nk_f32_t x = *src;
nk_fui32_t conv;
conv.f = x;
nk_u32_t sign_bit = conv.u >> 31;
nk_u32_t abs_bits = conv.u & 0x7FFFFFFFu;
nk_u8_t sign = (nk_u8_t)(sign_bit << 5);
// Zero
if (abs_bits == 0) {
*dest = (nk_e2m3_t)sign;
return;
}
nk_f32_t abs_x = sign_bit ? -x : x;
// Clamp to E2M3FN range [-7.5, 7.5]
// Max value: exp=3, mant=7 β (1 + 7/8) * 2^(3-1) = 1.875 * 4 = 7.5
if (abs_x >= 7.5f) {
*dest = (nk_e2m3_t)(sign | 0x1Fu); // Max: 0b011111
return;
}
// Subnormal range: [0, 1.0). exp=0, mant encodes value/0.125
if (abs_x < 1.0f) {
nk_f32_t scaled = abs_x * 8.0f; // Scale to mantissa range [0, 8)
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
// RNE rounding
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 8, promote to first normal (exp=1, mant=0)
if (mant > 7) {
*dest = (nk_e2m3_t)(sign | 0x08u);
return;
}
*dest = (nk_e2m3_t)(sign | (nk_u8_t)mant);
return;
}
// Normal range: extract exponent and mantissa
nk_i32_t exp = (nk_i32_t)((abs_bits >> 23) & 0xFFu) - 127;
nk_u32_t mantissa = abs_bits & 0x7FFFFFu;
nk_u32_t significand = (1u << 23) | mantissa;
// Round mantissa from 23 to 3 bits
nk_i32_t shift = 23 - 3;
nk_u32_t remainder_mask = (1u << shift) - 1;
nk_u32_t remainder = significand & remainder_mask;
nk_u32_t halfway = 1u << (shift - 1);
nk_u32_t significand_rounded = significand >> shift;
// RNE rounding
if (remainder > halfway || (remainder == halfway && (significand_rounded & 1))) { ++significand_rounded; }
// Handle carry into exponent
if (significand_rounded == (1u << 4)) {
significand_rounded >>= 1;
++exp;
}
// Rebias exponent: e2m3_exp = f32_exp + 1
nk_i32_t e2m3_exp = exp + 1;
// Clamp to valid range
if (e2m3_exp > 3) {
*dest = (nk_e2m3_t)(sign | 0x1Fu); // Max value
return;
}
if (e2m3_exp < 0) {
*dest = (nk_e2m3_t)sign; // Underflow to zero
return;
}
nk_u8_t exp_field = (nk_u8_t)e2m3_exp;
nk_u8_t mant_field = (nk_u8_t)(significand_rounded & 0x07u);
*dest = (nk_e2m3_t)(sign | (exp_field << 3) | mant_field);
}
/**
* @brief Convert FP6 E3M2FN to IEEE 754 single-precision float.
*
* E3M2FN (FP6) format: 1 sign bit, 3 exponent bits (bias=3), 2 mantissa bits.
* Range: [-28, +28], no infinity or NaN (OCP Microscaling FN format).
*/
NK_INTERNAL void nk_e3m2_to_f32_manual_(nk_e3m2_t const *src, nk_f32_t *dest) {
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)((raw >> 5) & 0x01u) << 31;
nk_u32_t exponent = (raw >> 2) & 0x07u;
nk_u32_t mantissa = raw & 0x03u;
nk_fui32_t conv;
// Handle zero
if (exponent == 0 && mantissa == 0) {
conv.u = sign;
*dest = conv.f;
return;
}
// Handle subnormal (exp=0, mant!=0)
if (exponent == 0) {
// Subnormal: value = 2^(-2) * (mantissa / 4)
nk_f32_t value = (nk_f32_t)mantissa * (1.0f / 16.0f); // 2^(-2) * (1/4) = 1/16
*dest = sign ? -value : value;
return;
}
// Normal values: rebias from E3M2 (bias=3) to F32 (bias=127)
// E3M2 exp range: 1-7 (unbiased: -2 to 4)
// F32 needs: (e3m2_exp - 3) + 127 = e3m2_exp + 124
nk_u32_t f32_exponent = (exponent + 124u) << 23;
nk_u32_t f32_mantissa = mantissa << 21;
conv.u = sign | f32_exponent | f32_mantissa;
*dest = conv.f;
}
NK_PUBLIC void nk_e3m2_to_f32_serial(nk_e3m2_t const *src, nk_f32_t *dest) {
static nk_u32_t const lut[32] = {
0x00000000, 0x3D800000, 0x3E000000, 0x3E400000, // exp=0 sub
0x3E800000, 0x3EA00000, 0x3EC00000, 0x3EE00000, // exp=1
0x3F000000, 0x3F200000, 0x3F400000, 0x3F600000, // exp=2
0x3F800000, 0x3FA00000, 0x3FC00000, 0x3FE00000, // exp=3
0x40000000, 0x40200000, 0x40400000, 0x40600000, // exp=4
0x40800000, 0x40A00000, 0x40C00000, 0x40E00000, // exp=5
0x41000000, 0x41200000, 0x41400000, 0x41600000, // exp=6
0x41800000, 0x41A00000, 0x41C00000, 0x41E00000, // exp=7
};
nk_u8_t raw = *src;
nk_u32_t sign = (nk_u32_t)((raw >> 5) & 0x01u) << 31;
nk_fui32_t conv;
conv.u = sign | lut[raw & 0x1F];
*dest = conv.f;
}
/**
* @brief Convert IEEE 754 single-precision float to FP6 E3M2FN.
*
* E3M2FN (FP6) format: 1 sign bit, 3 exponent bits (bias=3), 2 mantissa bits.
* Range: [-28, +28], no β or NaN. Saturates to max on overflow.
* Rounding: RNE (Round to Nearest Even) per IEEE 754.
* Subnormal threshold: values with |x| < 0.25 use subnormal encoding.
*/
NK_PUBLIC void nk_f32_to_e3m2_serial(nk_f32_t const *src, nk_e3m2_t *dest) {
nk_f32_t x = *src;
nk_fui32_t conv;
conv.f = x;
nk_u32_t sign_bit = conv.u >> 31;
nk_u32_t abs_bits = conv.u & 0x7FFFFFFFu;
nk_u8_t sign = (nk_u8_t)(sign_bit << 5);
// Zero
if (abs_bits == 0) {
*dest = (nk_e3m2_t)sign;
return;
}
nk_f32_t abs_x = sign_bit ? -x : x;
// Clamp to E3M2FN range [-28, 28]
// Max value: exp=7, mant=2 β (1 + 2/4) * 2^(7-3) = 1.5 * 16 = 24
// Actually max is exp=7, mant=3 β (1 + 3/4) * 2β΄ = 1.75 * 16 = 28
if (abs_x >= 28.0f) {
*dest = (nk_e3m2_t)(sign | 0x1Fu); // Max: 0b011111 (exp=7, mant=3)
return;
}
// Subnormal range: [0, 0.25). exp=0, mant encodes value/0.0625
if (abs_x < 0.25f) {
nk_f32_t scaled = abs_x * 16.0f; // Scale to mantissa range [0, 4)
nk_i32_t mant = (nk_i32_t)scaled;
nk_f32_t frac = scaled - (nk_f32_t)mant;
// RNE rounding
if (frac > 0.5f || (frac == 0.5f && (mant & 1))) { ++mant; }
// If rounds to 4, promote to first normal (exp=1, mant=0)
if (mant > 3) {
*dest = (nk_e3m2_t)(sign | 0x04u);
return;
}
*dest = (nk_e3m2_t)(sign | (nk_u8_t)mant);
return;
}
// Normal range: extract exponent and mantissa
nk_i32_t exp = (nk_i32_t)((abs_bits >> 23) & 0xFFu) - 127;
nk_u32_t mantissa = abs_bits & 0x7FFFFFu;
nk_u32_t significand = (1u << 23) | mantissa;