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A.G. and A.M. are co-first authors and wrote the text with senior author J.D. E.S., J.W.J., and Y.-J.L. were major contributors and ran experiments. R.C. and Y.-J.L. provided key insights and expertise in physical design throughout the drafting of this addendum. The following authors carefully reviewed the addendum and provided helpful feedback: J.P., J.L., W.H., E.T., R.H., K.S., M.Y., E.J., O.P., A.N., A.T., S.W. and Q.V.L.
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Goldie, A., Mirhoseini, A., Yazgan, M. et al. Addendum: A graph placement methodology for fast chip design. Nature 634, E10–E11 (2024). https://doi.org/10.1038/s41586-024-08032-5
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DOI: https://doi.org/10.1038/s41586-024-08032-5
