Build the Xilinx FPGA framework, bridges, regions, ZynqMP and Versal
managers, AFI, PR decoupler, configfs overlays and manager debugfs into
the arm64 kernel.
Add Zynq AXI FIFO interface(AFI) config driver. This is useful for the
configuration of the PS-PL interface on Zynq platform.
State: not-upstreamable
Reason: The existing AFI interface handling is done using an FPGA subsystem
but the maintainer suggested to use an interconnect subsystem.
[michals: v6.12 update
fpga: zynq-afi: Resolve kernel-doc warning in AFI struct description
]
Add zynqmp AXI FIFO interface(AFI) config driver. This is useful for the
configuration of the PS-PL interface on Zynq US+ MPSoC platform.
Link: https://lore.kernel<email address hidden>/
State: not-upstreamable
Reason: The existing AFI interface handling is done using an FPGA subsystem
but the maintainer suggested to use an interconnect subsystem.
[michals:
v6.12 update
fpga: Fix the reset handling
]
To avoid the unwanted copies at firmware(PMUFW) this patch provides
a fix to align PL configuration data if the data is not word-aligned.
It improves the PL configuration timings to process unaligned bit
files.
To align the configuration data this patch adds a few padding bytes and
these additional padding bytes will not create any functional impact on
the PL configuration.
Link: https://<email address hidden>/
State: not-upstreamable
Reason: Framework refactoring is needed to address
multiple-copies/alignment
issues.
Up on fpga configuration failure, the existing sysfs state interface
is just providing the generic error message rather than providing the
exact error code. This patch extends sysfs state interface to provide
the exact error received from the lower layer along with the existing
generic error message.
Handle the word swap in the FPGA driver itself before calling
zynqmp_pm_load_pdi(), and only for the Versal Gen 2
Use zynqmp_pm_get_family_info() to get family code and directly
compare the family code against PM_VERSAL2_FAMILY_CODE to determine
if word swapping is needed.
This simplifies the logic by removing the indirect platform data lookup and
makes the Versal Gen 2 specific requirement more explicit.
Select the extended feature check and firmware transport through platform
match data. Reuse the existing extended argument packer instead of
duplicating it in the basic path. TF-A remains basic; older platforms
retain explicit extended QUERY_DATA access.
Signed-off-by: Senthil Nathan Thangaraj <email address hidden>
Signed-off-by: Michal Simek <email address hidden>
(backported from commit 85d825263667ce37759836f7f78db23dcae16c99 https://github.com/Xilinx/linux-xlnx)
[kkaniewski: Keep the implementation in Resolute zynqmp.c and retain the
public zynqmp_pm_invoke_fw_fn function. Handle variable arguments in the
wrappers. Cast the feature API ID to u64 before shifting by 32. The vendor
expression shifts a u32. Preserve the existing TF-A feature checks. This
adds firmware transport support, not full platform support.]
Signed-off-by: Krystian Kaniewski <email address hidden>
